commit 915588d7230aa4dc81bf3bc1d589ed08f8750a07 Author: RodgerMornye <55375857+RodgerMornye@users.noreply.github.com> Date: Wed Mar 27 15:33:33 2024 +0300 First commit diff --git a/.generated_files/flags/default/17be92f4735b95bd850e870c0dc43db46694f8e8 b/.generated_files/flags/default/17be92f4735b95bd850e870c0dc43db46694f8e8 new file mode 100644 index 0000000..2ed9ca1 --- /dev/null +++ b/.generated_files/flags/default/17be92f4735b95bd850e870c0dc43db46694f8e8 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\rds\waves.c \ No newline at end of file diff --git a/.generated_files/flags/default/347b2cfef1a567398f98d57cd97d9b86b10c094 b/.generated_files/flags/default/347b2cfef1a567398f98d57cd97d9b86b10c094 new file mode 100644 index 0000000..41fc431 --- /dev/null +++ b/.generated_files/flags/default/347b2cfef1a567398f98d57cd97d9b86b10c094 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\ports.c \ No newline at end of file diff --git a/.generated_files/flags/default/40ee358cf9fbfd7cb5a3c6afac8e525a413ba2bd b/.generated_files/flags/default/40ee358cf9fbfd7cb5a3c6afac8e525a413ba2bd new file mode 100644 index 0000000..6051989 --- /dev/null +++ b/.generated_files/flags/default/40ee358cf9fbfd7cb5a3c6afac8e525a413ba2bd @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\clksys_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/4151d3122bc2e1ee2ce44b270126e33fecfee726 b/.generated_files/flags/default/4151d3122bc2e1ee2ce44b270126e33fecfee726 new file mode 100644 index 0000000..1216875 --- /dev/null +++ b/.generated_files/flags/default/4151d3122bc2e1ee2ce44b270126e33fecfee726 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\twi_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/48286a61e710f3b3ee3a6cf9a3e53edce47cdcf9 b/.generated_files/flags/default/48286a61e710f3b3ee3a6cf9a3e53edce47cdcf9 new file mode 100644 index 0000000..c9dd018 --- /dev/null +++ b/.generated_files/flags/default/48286a61e710f3b3ee3a6cf9a3e53edce47cdcf9 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\rds\dac.c \ No newline at end of file diff --git a/.generated_files/flags/default/4f698cc965e4a2ec8e5888a97f4be5ec9ad8ab96 b/.generated_files/flags/default/4f698cc965e4a2ec8e5888a97f4be5ec9ad8ab96 new file mode 100644 index 0000000..b3d14c4 --- /dev/null +++ b/.generated_files/flags/default/4f698cc965e4a2ec8e5888a97f4be5ec9ad8ab96 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\rds\rds.c \ No newline at end of file diff --git a/.generated_files/flags/default/4f8a429b4c2d4e3ce3e6613c04577021db68efa2 b/.generated_files/flags/default/4f8a429b4c2d4e3ce3e6613c04577021db68efa2 new file mode 100644 index 0000000..3191019 --- /dev/null +++ b/.generated_files/flags/default/4f8a429b4c2d4e3ce3e6613c04577021db68efa2 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\usart_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/5521704e586e98d0b09bd90e00e23c0cc92fbf5a b/.generated_files/flags/default/5521704e586e98d0b09bd90e00e23c0cc92fbf5a new file mode 100644 index 0000000..48720cd --- /dev/null +++ b/.generated_files/flags/default/5521704e586e98d0b09bd90e00e23c0cc92fbf5a @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\uecp\usart.c \ No newline at end of file diff --git a/.generated_files/flags/default/6388cbe67fc58e3f25058aef5c10d2f50f905bf8 b/.generated_files/flags/default/6388cbe67fc58e3f25058aef5c10d2f50f905bf8 new file mode 100644 index 0000000..b2253d7 --- /dev/null +++ b/.generated_files/flags/default/6388cbe67fc58e3f25058aef5c10d2f50f905bf8 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\uecp\usart.c \ No newline at end of file diff --git a/.generated_files/flags/default/664b4e8894a05152fbaf466987ada07b3e65b522 b/.generated_files/flags/default/664b4e8894a05152fbaf466987ada07b3e65b522 new file mode 100644 index 0000000..0534269 --- /dev/null +++ b/.generated_files/flags/default/664b4e8894a05152fbaf466987ada07b3e65b522 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\main.c \ No newline at end of file diff --git a/.generated_files/flags/default/66d35063743e053b20a8c6a73e773f7bc5364808 b/.generated_files/flags/default/66d35063743e053b20a8c6a73e773f7bc5364808 new file mode 100644 index 0000000..4b342a6 --- /dev/null +++ b/.generated_files/flags/default/66d35063743e053b20a8c6a73e773f7bc5364808 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\twi_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/6935891923e7d4fa33694cf7fa1bf221f8420493 b/.generated_files/flags/default/6935891923e7d4fa33694cf7fa1bf221f8420493 new file mode 100644 index 0000000..7dd0def --- /dev/null +++ b/.generated_files/flags/default/6935891923e7d4fa33694cf7fa1bf221f8420493 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\rds\dac.c \ No newline at end of file diff --git a/.generated_files/flags/default/6e131afbca614e9f2695200b051a756427f0aaba b/.generated_files/flags/default/6e131afbca614e9f2695200b051a756427f0aaba new file mode 100644 index 0000000..98059cc --- /dev/null +++ b/.generated_files/flags/default/6e131afbca614e9f2695200b051a756427f0aaba @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\main.c \ No newline at end of file diff --git a/.generated_files/flags/default/6f203df865725733d1bee91678ac992fe0cae722 b/.generated_files/flags/default/6f203df865725733d1bee91678ac992fe0cae722 new file mode 100644 index 0000000..d477eaf --- /dev/null +++ b/.generated_files/flags/default/6f203df865725733d1bee91678ac992fe0cae722 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\rds\waves.c \ No newline at end of file diff --git a/.generated_files/flags/default/823e444bef31acc8cf59c9829c6561ba9065c222 b/.generated_files/flags/default/823e444bef31acc8cf59c9829c6561ba9065c222 new file mode 100644 index 0000000..6d1f813 --- /dev/null +++ b/.generated_files/flags/default/823e444bef31acc8cf59c9829c6561ba9065c222 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\dac_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/8aae5bc0a330a131f197b24a2ec2384b6df804d1 b/.generated_files/flags/default/8aae5bc0a330a131f197b24a2ec2384b6df804d1 new file mode 100644 index 0000000..3451e03 --- /dev/null +++ b/.generated_files/flags/default/8aae5bc0a330a131f197b24a2ec2384b6df804d1 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\uecp\uecp.c \ No newline at end of file diff --git a/.generated_files/flags/default/8e6eb26c7903026c850985e977b354d0d419314c b/.generated_files/flags/default/8e6eb26c7903026c850985e977b354d0d419314c new file mode 100644 index 0000000..f95ca79 --- /dev/null +++ b/.generated_files/flags/default/8e6eb26c7903026c850985e977b354d0d419314c @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\dma_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/9332395a63a610f1051f52bd9b73bf7507d018c9 b/.generated_files/flags/default/9332395a63a610f1051f52bd9b73bf7507d018c9 new file mode 100644 index 0000000..6462991 --- /dev/null +++ b/.generated_files/flags/default/9332395a63a610f1051f52bd9b73bf7507d018c9 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\port_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/952bf3a22822ab27a53c550874853f1340c4c3ae b/.generated_files/flags/default/952bf3a22822ab27a53c550874853f1340c4c3ae new file mode 100644 index 0000000..9a7de55 --- /dev/null +++ b/.generated_files/flags/default/952bf3a22822ab27a53c550874853f1340c4c3ae @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\Si5351A\Si5351A.c \ No newline at end of file diff --git a/.generated_files/flags/default/b713ea3e6147330ed0409c0757a421f13bdb214e b/.generated_files/flags/default/b713ea3e6147330ed0409c0757a421f13bdb214e new file mode 100644 index 0000000..b6da2ec --- /dev/null +++ b/.generated_files/flags/default/b713ea3e6147330ed0409c0757a421f13bdb214e @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\Si5351A\Si5351A.c \ No newline at end of file diff --git a/.generated_files/flags/default/b9a2220f457223a5d83604ed5e2241885ebe374d b/.generated_files/flags/default/b9a2220f457223a5d83604ed5e2241885ebe374d new file mode 100644 index 0000000..fa79c34 --- /dev/null +++ b/.generated_files/flags/default/b9a2220f457223a5d83604ed5e2241885ebe374d @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\port_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/c50f5588ba9029bd316c59fac92b7f99aa6109a6 b/.generated_files/flags/default/c50f5588ba9029bd316c59fac92b7f99aa6109a6 new file mode 100644 index 0000000..cb347e3 --- /dev/null +++ b/.generated_files/flags/default/c50f5588ba9029bd316c59fac92b7f99aa6109a6 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\ports.c \ No newline at end of file diff --git a/.generated_files/flags/default/c95867c34aed8fa55281266c54bf195aaab0155e b/.generated_files/flags/default/c95867c34aed8fa55281266c54bf195aaab0155e new file mode 100644 index 0000000..9a85c92 --- /dev/null +++ b/.generated_files/flags/default/c95867c34aed8fa55281266c54bf195aaab0155e @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\clksys_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/d4fe7cd17bc9eaee2491420854262635d4af3f4b b/.generated_files/flags/default/d4fe7cd17bc9eaee2491420854262635d4af3f4b new file mode 100644 index 0000000..f25f8b9 --- /dev/null +++ b/.generated_files/flags/default/d4fe7cd17bc9eaee2491420854262635d4af3f4b @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\uecp\uecp.c \ No newline at end of file diff --git a/.generated_files/flags/default/e1943c143250bdec73805a6f4d9b37b5c496705f b/.generated_files/flags/default/e1943c143250bdec73805a6f4d9b37b5c496705f new file mode 100644 index 0000000..ffdce16 --- /dev/null +++ b/.generated_files/flags/default/e1943c143250bdec73805a6f4d9b37b5c496705f @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\dma_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/e2f7cd72008582f0c414bc1aca61991c853e1053 b/.generated_files/flags/default/e2f7cd72008582f0c414bc1aca61991c853e1053 new file mode 100644 index 0000000..4ef0924 --- /dev/null +++ b/.generated_files/flags/default/e2f7cd72008582f0c414bc1aca61991c853e1053 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\rds\rds.c \ No newline at end of file diff --git a/.generated_files/flags/default/e81396bf52f92cccc0bd7722de509678d141f83f b/.generated_files/flags/default/e81396bf52f92cccc0bd7722de509678d141f83f new file mode 100644 index 0000000..6c4f88a --- /dev/null +++ b/.generated_files/flags/default/e81396bf52f92cccc0bd7722de509678d141f83f @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\dac_driver.c \ No newline at end of file diff --git a/.generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f b/.generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f new file mode 100644 index 0000000..423b4fe --- /dev/null +++ b/.generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f @@ -0,0 +1,38 @@ +# +# Generated Makefile - do not edit! +# +# +# This file contains information about the location of compilers and other tools. +# If you commmit this file into your revision control server, you will be able to +# to checkout the project and build it from the command line with make. However, +# if more than one person works on the same project, then this file might show +# conflicts since different users are bound to have compilers in different places. +# In that case you might choose to not commit this file and let MPLAB X recreate this file +# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at +# least once so the file gets created and the project can be built. Finally, you can also +# avoid using this file at all if you are only building from the command line with make. +# You can invoke make with the values of the macros: +# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ... +# +SHELL=cmd.exe +PATH_TO_IDE_BIN=F:/Programm/mplab_platform/platform/../mplab_ide/modules/../../bin/ +# Adding MPLAB X bin directory to path. +PATH:=F:/Programm/mplab_platform/platform/../mplab_ide/modules/../../bin/:$(PATH) +# Path to java used to run MPLAB X when this makefile was created +MP_JAVA_PATH="F:\Programm\sys\java\zulu8.54.0.21-ca-fx-jre8.0.292-win_x64/bin/" +OS_CURRENT="$(shell uname -s)" +MP_CC="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-cc.exe" +# MP_CPPC is not defined +# MP_BC is not defined +MP_AS="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-cc.exe" +MP_LD="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-cc.exe" +MP_AR="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-ar.exe" +DEP_GEN=${MP_JAVA_PATH}java -jar "F:/Programm/mplab_platform/platform/../mplab_ide/modules/../../bin/extractobjectdependencies.jar" +MP_CC_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +# MP_CPPC_DIR is not defined +# MP_BC_DIR is not defined +MP_AS_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +MP_LD_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +MP_AR_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +# MP_BC_DIR is not defined +DFP_DIR=F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54 diff --git a/.generated_files/flags/default/fbf1ac7a9ea8c9701fe74bfe2a92f25f709cb21 b/.generated_files/flags/default/fbf1ac7a9ea8c9701fe74bfe2a92f25f709cb21 new file mode 100644 index 0000000..b632b90 --- /dev/null +++ b/.generated_files/flags/default/fbf1ac7a9ea8c9701fe74bfe2a92f25f709cb21 @@ -0,0 +1 @@ + $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\src\drivers\usart_driver.c \ No newline at end of file diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..fca8e2c --- /dev/null +++ b/Makefile @@ -0,0 +1,113 @@ +# +# There exist several targets which are by default empty and which can be +# used for execution of your targets. These targets are usually executed +# before and after some main targets. They are: +# +# .build-pre: called before 'build' target +# .build-post: called after 'build' target +# .clean-pre: called before 'clean' target +# .clean-post: called after 'clean' target +# .clobber-pre: called before 'clobber' target +# .clobber-post: called after 'clobber' target +# .all-pre: called before 'all' target +# .all-post: called after 'all' target +# .help-pre: called before 'help' target +# .help-post: called after 'help' target +# +# Targets beginning with '.' are not intended to be called on their own. +# +# Main targets can be executed directly, and they are: +# +# build build a specific configuration +# clean remove built files from a configuration +# clobber remove all built files +# all build all configurations +# help print help mesage +# +# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and +# .help-impl are implemented in nbproject/makefile-impl.mk. +# +# Available make variables: +# +# CND_BASEDIR base directory for relative paths +# CND_DISTDIR default top distribution directory (build artifacts) +# CND_BUILDDIR default top build directory (object files, ...) +# CONF name of current configuration +# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration) +# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration) +# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration) +# CND_PACKAGE_DIR_${CONF} directory of package (current configuration) +# CND_PACKAGE_NAME_${CONF} name of package (current configuration) +# CND_PACKAGE_PATH_${CONF} path to package (current configuration) +# +# NOCDDL + + +# Environment +MKDIR=mkdir +CP=cp +CCADMIN=CCadmin +RANLIB=ranlib + + +# build +build: .build-post + +.build-pre: +# Add your pre 'build' code here... + +.build-post: .build-impl +# Add your post 'build' code here... + + +# clean +clean: .clean-post + +.clean-pre: +# Add your pre 'clean' code here... +# WARNING: the IDE does not call this target since it takes a long time to +# simply run make. Instead, the IDE removes the configuration directories +# under build and dist directly without calling make. +# This target is left here so people can do a clean when running a clean +# outside the IDE. + +.clean-post: .clean-impl +# Add your post 'clean' code here... + + +# clobber +clobber: .clobber-post + +.clobber-pre: +# Add your pre 'clobber' code here... + +.clobber-post: .clobber-impl +# Add your post 'clobber' code here... + + +# all +all: .all-post + +.all-pre: +# Add your pre 'all' code here... + +.all-post: .all-impl +# Add your post 'all' code here... + + +# help +help: .help-post + +.help-pre: +# Add your pre 'help' code here... + +.help-post: .help-impl +# Add your post 'help' code here... + + + +# include project implementation makefile +include nbproject/Makefile-impl.mk + +# include project make variables +include nbproject/Makefile-variables.mk diff --git a/build/default/debug/_ext/1065973326/main.o b/build/default/debug/_ext/1065973326/main.o new file mode 100644 index 0000000..115bb6b Binary files /dev/null and b/build/default/debug/_ext/1065973326/main.o differ diff --git a/build/default/debug/_ext/1065973326/main.o.d b/build/default/debug/_ext/1065973326/main.o.d new file mode 100644 index 0000000..4d58e07 --- /dev/null +++ b/build/default/debug/_ext/1065973326/main.o.d @@ -0,0 +1,115 @@ +build/default/debug/_ext/1065973326/main.o.d \ + build/default/debug/_ext/1065973326/main.o: ../RDS_Encoder.X/src/main.c \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + ../RDS_Encoder.X/src/Si5351A/Si5351A.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/clksys_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/ports.h ../RDS_Encoder.X/src/rds/dac.h \ + ../RDS_Encoder.X/src/rds/../config.h ../RDS_Encoder.X/src/rds/waves.h \ + ../RDS_Encoder.X/src/rds/rds.h ../RDS_Encoder.X/src/uecp/usart.h \ + ../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../avr_compiler.h \ + ../RDS_Encoder.X/src/config.h ../RDS_Encoder.X/src/drivers/dac_driver.h \ + ../RDS_Encoder.X/src/drivers/dma_driver.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +../RDS_Encoder.X/src/Si5351A/Si5351A.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/clksys_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/ports.h: + +../RDS_Encoder.X/src/rds/dac.h: + +../RDS_Encoder.X/src/rds/../config.h: + +../RDS_Encoder.X/src/rds/waves.h: + +../RDS_Encoder.X/src/rds/rds.h: + +../RDS_Encoder.X/src/uecp/usart.h: + +../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h: + +../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../avr_compiler.h: + +../RDS_Encoder.X/src/config.h: + +../RDS_Encoder.X/src/drivers/dac_driver.h: + +../RDS_Encoder.X/src/drivers/dma_driver.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h: diff --git a/build/default/debug/_ext/1065973326/ports.o b/build/default/debug/_ext/1065973326/ports.o new file mode 100644 index 0000000..3493cc6 Binary files /dev/null and b/build/default/debug/_ext/1065973326/ports.o differ diff --git a/build/default/debug/_ext/1065973326/ports.o.d b/build/default/debug/_ext/1065973326/ports.o.d new file mode 100644 index 0000000..fb6a97a --- /dev/null +++ b/build/default/debug/_ext/1065973326/ports.o.d @@ -0,0 +1,80 @@ +build/default/debug/_ext/1065973326/ports.o.d \ + build/default/debug/_ext/1065973326/ports.o: \ + ../RDS_Encoder.X/src/ports.c ../RDS_Encoder.X/src/ports.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + ../RDS_Encoder.X/src/drivers/port_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/ports.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +../RDS_Encoder.X/src/drivers/port_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/debug/_ext/1303998032/Si5351A.o b/build/default/debug/_ext/1303998032/Si5351A.o new file mode 100644 index 0000000..ba7f475 Binary files /dev/null and b/build/default/debug/_ext/1303998032/Si5351A.o differ diff --git a/build/default/debug/_ext/1303998032/Si5351A.o.d b/build/default/debug/_ext/1303998032/Si5351A.o.d new file mode 100644 index 0000000..4ab609f --- /dev/null +++ b/build/default/debug/_ext/1303998032/Si5351A.o.d @@ -0,0 +1,54 @@ +build/default/debug/_ext/1303998032/Si5351A.o.d \ + build/default/debug/_ext/1303998032/Si5351A.o: \ + ../RDS_Encoder.X/src/Si5351A/Si5351A.c \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + ../RDS_Encoder.X/src/Si5351A/Si5351A.h \ + ../RDS_Encoder.X/src/Si5351A/Si5351A-RevB-Registers.h \ + ../RDS_Encoder.X/src/Si5351A/../drivers/twi_driver.h + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +../RDS_Encoder.X/src/Si5351A/Si5351A.h: + +../RDS_Encoder.X/src/Si5351A/Si5351A-RevB-Registers.h: + +../RDS_Encoder.X/src/Si5351A/../drivers/twi_driver.h: diff --git a/build/default/debug/_ext/237546978/uecp.o b/build/default/debug/_ext/237546978/uecp.o new file mode 100644 index 0000000..0820764 Binary files /dev/null and b/build/default/debug/_ext/237546978/uecp.o differ diff --git a/build/default/debug/_ext/237546978/uecp.o.d b/build/default/debug/_ext/237546978/uecp.o.d new file mode 100644 index 0000000..f8d8cdd --- /dev/null +++ b/build/default/debug/_ext/237546978/uecp.o.d @@ -0,0 +1,104 @@ +build/default/debug/_ext/237546978/uecp.o.d \ + build/default/debug/_ext/237546978/uecp.o: \ + ../RDS_Encoder.X/src/uecp/uecp.c \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + ../RDS_Encoder.X/src/uecp/../rds/rds.h \ + ../RDS_Encoder.X/src/uecp/../ports.h ../RDS_Encoder.X/src/uecp/usart.h \ + ../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/uecp/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../rds/dac.h \ + ../RDS_Encoder.X/src/uecp/../rds/../config.h \ + ../RDS_Encoder.X/src/uecp/../rds/waves.h + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +../RDS_Encoder.X/src/uecp/../rds/rds.h: + +../RDS_Encoder.X/src/uecp/../ports.h: + +../RDS_Encoder.X/src/uecp/usart.h: + +../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h: + +../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/uecp/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../rds/dac.h: + +../RDS_Encoder.X/src/uecp/../rds/../config.h: + +../RDS_Encoder.X/src/uecp/../rds/waves.h: diff --git a/build/default/debug/_ext/237546978/usart.o b/build/default/debug/_ext/237546978/usart.o new file mode 100644 index 0000000..442fbf9 Binary files /dev/null and b/build/default/debug/_ext/237546978/usart.o differ diff --git a/build/default/debug/_ext/237546978/usart.o.d b/build/default/debug/_ext/237546978/usart.o.d new file mode 100644 index 0000000..4574d29 --- /dev/null +++ b/build/default/debug/_ext/237546978/usart.o.d @@ -0,0 +1,91 @@ +build/default/debug/_ext/237546978/usart.o.d \ + build/default/debug/_ext/237546978/usart.o: \ + ../RDS_Encoder.X/src/uecp/usart.c ../RDS_Encoder.X/src/uecp/usart.h \ + ../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/uecp/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/uecp.h ../RDS_Encoder.X/src/uecp/../config.h \ + ../RDS_Encoder.X/src/uecp/../ports.h + +../RDS_Encoder.X/src/uecp/usart.h: + +../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h: + +../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/uecp/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/uecp.h: + +../RDS_Encoder.X/src/uecp/../config.h: + +../RDS_Encoder.X/src/uecp/../ports.h: diff --git a/build/default/debug/_ext/480578934/clksys_driver.o b/build/default/debug/_ext/480578934/clksys_driver.o new file mode 100644 index 0000000..86fab9f Binary files /dev/null and b/build/default/debug/_ext/480578934/clksys_driver.o differ diff --git a/build/default/debug/_ext/480578934/clksys_driver.o.d b/build/default/debug/_ext/480578934/clksys_driver.o.d new file mode 100644 index 0000000..4955c92 --- /dev/null +++ b/build/default/debug/_ext/480578934/clksys_driver.o.d @@ -0,0 +1,78 @@ +build/default/debug/_ext/480578934/clksys_driver.o.d \ + build/default/debug/_ext/480578934/clksys_driver.o: \ + ../RDS_Encoder.X/src/drivers/clksys_driver.c \ + ../RDS_Encoder.X/src/drivers/clksys_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/clksys_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/debug/_ext/480578934/dac_driver.o b/build/default/debug/_ext/480578934/dac_driver.o new file mode 100644 index 0000000..d2ad26d Binary files /dev/null and b/build/default/debug/_ext/480578934/dac_driver.o differ diff --git a/build/default/debug/_ext/480578934/dac_driver.o.d b/build/default/debug/_ext/480578934/dac_driver.o.d new file mode 100644 index 0000000..85db7e8 --- /dev/null +++ b/build/default/debug/_ext/480578934/dac_driver.o.d @@ -0,0 +1,78 @@ +build/default/debug/_ext/480578934/dac_driver.o.d \ + build/default/debug/_ext/480578934/dac_driver.o: \ + ../RDS_Encoder.X/src/drivers/dac_driver.c \ + ../RDS_Encoder.X/src/drivers/dac_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/dac_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/debug/_ext/480578934/dma_driver.o b/build/default/debug/_ext/480578934/dma_driver.o new file mode 100644 index 0000000..f235609 Binary files /dev/null and b/build/default/debug/_ext/480578934/dma_driver.o differ diff --git a/build/default/debug/_ext/480578934/dma_driver.o.d b/build/default/debug/_ext/480578934/dma_driver.o.d new file mode 100644 index 0000000..bbe08b1 --- /dev/null +++ b/build/default/debug/_ext/480578934/dma_driver.o.d @@ -0,0 +1,78 @@ +build/default/debug/_ext/480578934/dma_driver.o.d \ + build/default/debug/_ext/480578934/dma_driver.o: \ + ../RDS_Encoder.X/src/drivers/dma_driver.c \ + ../RDS_Encoder.X/src/drivers/dma_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/dma_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/debug/_ext/480578934/port_driver.o b/build/default/debug/_ext/480578934/port_driver.o new file mode 100644 index 0000000..d1ba6cd Binary files /dev/null and b/build/default/debug/_ext/480578934/port_driver.o differ diff --git a/build/default/debug/_ext/480578934/port_driver.o.d b/build/default/debug/_ext/480578934/port_driver.o.d new file mode 100644 index 0000000..3a5adfc --- /dev/null +++ b/build/default/debug/_ext/480578934/port_driver.o.d @@ -0,0 +1,78 @@ +build/default/debug/_ext/480578934/port_driver.o.d \ + build/default/debug/_ext/480578934/port_driver.o: \ + ../RDS_Encoder.X/src/drivers/port_driver.c \ + ../RDS_Encoder.X/src/drivers/port_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/port_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/debug/_ext/480578934/twi_driver.o b/build/default/debug/_ext/480578934/twi_driver.o new file mode 100644 index 0000000..5219a74 Binary files /dev/null and b/build/default/debug/_ext/480578934/twi_driver.o differ diff --git a/build/default/debug/_ext/480578934/twi_driver.o.d b/build/default/debug/_ext/480578934/twi_driver.o.d new file mode 100644 index 0000000..bb20b89 --- /dev/null +++ b/build/default/debug/_ext/480578934/twi_driver.o.d @@ -0,0 +1,81 @@ +build/default/debug/_ext/480578934/twi_driver.o.d \ + build/default/debug/_ext/480578934/twi_driver.o: \ + ../RDS_Encoder.X/src/drivers/twi_driver.c \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/drivers/twi_driver.h \ + ../RDS_Encoder.X/src/drivers/../config.h + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/drivers/twi_driver.h: + +../RDS_Encoder.X/src/drivers/../config.h: diff --git a/build/default/debug/_ext/480578934/usart_driver.o b/build/default/debug/_ext/480578934/usart_driver.o new file mode 100644 index 0000000..fc26416 Binary files /dev/null and b/build/default/debug/_ext/480578934/usart_driver.o differ diff --git a/build/default/debug/_ext/480578934/usart_driver.o.d b/build/default/debug/_ext/480578934/usart_driver.o.d new file mode 100644 index 0000000..ddb6cfc --- /dev/null +++ b/build/default/debug/_ext/480578934/usart_driver.o.d @@ -0,0 +1,78 @@ +build/default/debug/_ext/480578934/usart_driver.o.d \ + build/default/debug/_ext/480578934/usart_driver.o: \ + ../RDS_Encoder.X/src/drivers/usart_driver.c \ + ../RDS_Encoder.X/src/drivers/usart_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/usart_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/debug/_ext/700402368/dac.o b/build/default/debug/_ext/700402368/dac.o new file mode 100644 index 0000000..78c9cee Binary files /dev/null and b/build/default/debug/_ext/700402368/dac.o differ diff --git a/build/default/debug/_ext/700402368/dac.o.d b/build/default/debug/_ext/700402368/dac.o.d new file mode 100644 index 0000000..ef85c2e --- /dev/null +++ b/build/default/debug/_ext/700402368/dac.o.d @@ -0,0 +1,94 @@ +build/default/debug/_ext/700402368/dac.o.d \ + build/default/debug/_ext/700402368/dac.o: ../RDS_Encoder.X/src/rds/dac.c \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/rds/../drivers/dma_driver.h \ + ../RDS_Encoder.X/src/rds/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/rds/../drivers/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/rds/dac.h ../RDS_Encoder.X/src/rds/../config.h \ + ../RDS_Encoder.X/src/rds/waves.h \ + ../RDS_Encoder.X/src/rds/../drivers/dac_driver.h \ + ../RDS_Encoder.X/src/rds/../rds/rds.h \ + ../RDS_Encoder.X/src/rds/../ports.h + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/rds/../drivers/dma_driver.h: + +../RDS_Encoder.X/src/rds/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/rds/../drivers/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/rds/dac.h: + +../RDS_Encoder.X/src/rds/../config.h: + +../RDS_Encoder.X/src/rds/waves.h: + +../RDS_Encoder.X/src/rds/../drivers/dac_driver.h: + +../RDS_Encoder.X/src/rds/../rds/rds.h: + +../RDS_Encoder.X/src/rds/../ports.h: diff --git a/build/default/debug/_ext/700402368/rds.o b/build/default/debug/_ext/700402368/rds.o new file mode 100644 index 0000000..c578660 Binary files /dev/null and b/build/default/debug/_ext/700402368/rds.o differ diff --git a/build/default/debug/_ext/700402368/rds.o.d b/build/default/debug/_ext/700402368/rds.o.d new file mode 100644 index 0000000..6e1a79f --- /dev/null +++ b/build/default/debug/_ext/700402368/rds.o.d @@ -0,0 +1,32 @@ +build/default/debug/_ext/700402368/rds.o.d \ + build/default/debug/_ext/700402368/rds.o: ../RDS_Encoder.X/src/rds/rds.c \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\time.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\sys\time.h \ + ../RDS_Encoder.X/src/rds/rds.h + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\time.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\sys\time.h: + +../RDS_Encoder.X/src/rds/rds.h: diff --git a/build/default/debug/_ext/700402368/waves.o b/build/default/debug/_ext/700402368/waves.o new file mode 100644 index 0000000..ed66708 Binary files /dev/null and b/build/default/debug/_ext/700402368/waves.o differ diff --git a/build/default/debug/_ext/700402368/waves.o.d b/build/default/debug/_ext/700402368/waves.o.d new file mode 100644 index 0000000..d353973 --- /dev/null +++ b/build/default/debug/_ext/700402368/waves.o.d @@ -0,0 +1,29 @@ +build/default/debug/_ext/700402368/waves.o.d \ + build/default/debug/_ext/700402368/waves.o: \ + ../RDS_Encoder.X/src/rds/waves.c \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/rds/waves.h ../RDS_Encoder.X/src/rds/../config.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/rds/waves.h: + +../RDS_Encoder.X/src/rds/../config.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/production/_ext/1065973326/main.o b/build/default/production/_ext/1065973326/main.o new file mode 100644 index 0000000..5c04853 Binary files /dev/null and b/build/default/production/_ext/1065973326/main.o differ diff --git a/build/default/production/_ext/1065973326/main.o.d b/build/default/production/_ext/1065973326/main.o.d new file mode 100644 index 0000000..6dc4928 --- /dev/null +++ b/build/default/production/_ext/1065973326/main.o.d @@ -0,0 +1,136 @@ +build/default/production/_ext/1065973326/main.o.d \ + build/default/production/_ext/1065973326/main.o: \ + ../RDS_Encoder.X/src/main.c \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + ../RDS_Encoder.X/src/Si5351A/Si5351A.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/clksys_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/drivers/../Si5351A/Si5351A.h \ + ../RDS_Encoder.X/src/ports.h ../RDS_Encoder.X/src/rds/dac.h \ + ../RDS_Encoder.X/src/rds/../config.h ../RDS_Encoder.X/src/rds/waves.h \ + ../RDS_Encoder.X/src/rds/rds.h ../RDS_Encoder.X/src/uecp/usart.h \ + ../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../config.h ../RDS_Encoder.X/src/uecp/uecp.h \ + ../RDS_Encoder.X/src/config.h ../RDS_Encoder.X/src/drivers/dac_driver.h \ + ../RDS_Encoder.X/src/drivers/dma_driver.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\eeprom.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +../RDS_Encoder.X/src/Si5351A/Si5351A.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/clksys_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/drivers/../Si5351A/Si5351A.h: + +../RDS_Encoder.X/src/ports.h: + +../RDS_Encoder.X/src/rds/dac.h: + +../RDS_Encoder.X/src/rds/../config.h: + +../RDS_Encoder.X/src/rds/waves.h: + +../RDS_Encoder.X/src/rds/rds.h: + +../RDS_Encoder.X/src/uecp/usart.h: + +../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h: + +../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../config.h: + +../RDS_Encoder.X/src/uecp/uecp.h: + +../RDS_Encoder.X/src/config.h: + +../RDS_Encoder.X/src/drivers/dac_driver.h: + +../RDS_Encoder.X/src/drivers/dma_driver.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\eeprom.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h: diff --git a/build/default/production/_ext/1065973326/ports.o b/build/default/production/_ext/1065973326/ports.o new file mode 100644 index 0000000..9751e84 Binary files /dev/null and b/build/default/production/_ext/1065973326/ports.o differ diff --git a/build/default/production/_ext/1065973326/ports.o.d b/build/default/production/_ext/1065973326/ports.o.d new file mode 100644 index 0000000..8a5241b --- /dev/null +++ b/build/default/production/_ext/1065973326/ports.o.d @@ -0,0 +1,86 @@ +build/default/production/_ext/1065973326/ports.o.d \ + build/default/production/_ext/1065973326/ports.o: \ + ../RDS_Encoder.X/src/ports.c ../RDS_Encoder.X/src/ports.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + ../RDS_Encoder.X/src/drivers/port_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/ports.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +../RDS_Encoder.X/src/drivers/port_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/production/_ext/1303998032/Si5351A.o b/build/default/production/_ext/1303998032/Si5351A.o new file mode 100644 index 0000000..3c74ad9 Binary files /dev/null and b/build/default/production/_ext/1303998032/Si5351A.o differ diff --git a/build/default/production/_ext/1303998032/Si5351A.o.d b/build/default/production/_ext/1303998032/Si5351A.o.d new file mode 100644 index 0000000..28560ff --- /dev/null +++ b/build/default/production/_ext/1303998032/Si5351A.o.d @@ -0,0 +1,54 @@ +build/default/production/_ext/1303998032/Si5351A.o.d \ + build/default/production/_ext/1303998032/Si5351A.o: \ + ../RDS_Encoder.X/src/Si5351A/Si5351A.c \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + ../RDS_Encoder.X/src/Si5351A/Si5351A.h \ + ../RDS_Encoder.X/src/Si5351A/Si5351A-RevB-Registers.h \ + ../RDS_Encoder.X/src/Si5351A/../drivers/twi_driver.h + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +../RDS_Encoder.X/src/Si5351A/Si5351A.h: + +../RDS_Encoder.X/src/Si5351A/Si5351A-RevB-Registers.h: + +../RDS_Encoder.X/src/Si5351A/../drivers/twi_driver.h: diff --git a/build/default/production/_ext/237546978/uecp.o b/build/default/production/_ext/237546978/uecp.o new file mode 100644 index 0000000..4876be8 Binary files /dev/null and b/build/default/production/_ext/237546978/uecp.o differ diff --git a/build/default/production/_ext/237546978/uecp.o.d b/build/default/production/_ext/237546978/uecp.o.d new file mode 100644 index 0000000..d91090a --- /dev/null +++ b/build/default/production/_ext/237546978/uecp.o.d @@ -0,0 +1,113 @@ +build/default/production/_ext/237546978/uecp.o.d \ + build/default/production/_ext/237546978/uecp.o: \ + ../RDS_Encoder.X/src/uecp/uecp.c \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + ../RDS_Encoder.X/src/uecp/../rds/rds.h \ + ../RDS_Encoder.X/src/uecp/../ports.h ../RDS_Encoder.X/src/uecp/usart.h \ + ../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../config.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../rds/rds.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/uecp/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../config.h \ + ../RDS_Encoder.X/src/uecp/../rds/dac.h \ + ../RDS_Encoder.X/src/uecp/../rds/../config.h \ + ../RDS_Encoder.X/src/uecp/../rds/waves.h + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +../RDS_Encoder.X/src/uecp/../rds/rds.h: + +../RDS_Encoder.X/src/uecp/../ports.h: + +../RDS_Encoder.X/src/uecp/usart.h: + +../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h: + +../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../drivers/../config.h: + +../RDS_Encoder.X/src/uecp/../drivers/../rds/rds.h: + +../RDS_Encoder.X/src/uecp/../drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/uecp/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../config.h: + +../RDS_Encoder.X/src/uecp/../rds/dac.h: + +../RDS_Encoder.X/src/uecp/../rds/../config.h: + +../RDS_Encoder.X/src/uecp/../rds/waves.h: diff --git a/build/default/production/_ext/237546978/usart.o b/build/default/production/_ext/237546978/usart.o new file mode 100644 index 0000000..d4bcb67 Binary files /dev/null and b/build/default/production/_ext/237546978/usart.o differ diff --git a/build/default/production/_ext/237546978/usart.o.d b/build/default/production/_ext/237546978/usart.o.d new file mode 100644 index 0000000..dc39c41 --- /dev/null +++ b/build/default/production/_ext/237546978/usart.o.d @@ -0,0 +1,97 @@ +build/default/production/_ext/237546978/usart.o.d \ + build/default/production/_ext/237546978/usart.o: \ + ../RDS_Encoder.X/src/uecp/usart.c ../RDS_Encoder.X/src/uecp/usart.h \ + ../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../config.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../rds/rds.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/uecp/../drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/uecp/../avr_compiler.h \ + ../RDS_Encoder.X/src/uecp/../config.h ../RDS_Encoder.X/src/uecp/uecp.h \ + ../RDS_Encoder.X/src/uecp/../ports.h + +../RDS_Encoder.X/src/uecp/usart.h: + +../RDS_Encoder.X/src/uecp/../drivers/usart_driver.h: + +../RDS_Encoder.X/src/uecp/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../drivers/../config.h: + +../RDS_Encoder.X/src/uecp/../drivers/../rds/rds.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/uecp/../drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/uecp/../avr_compiler.h: + +../RDS_Encoder.X/src/uecp/../config.h: + +../RDS_Encoder.X/src/uecp/uecp.h: + +../RDS_Encoder.X/src/uecp/../ports.h: diff --git a/build/default/production/_ext/480578934/clksys_driver.o b/build/default/production/_ext/480578934/clksys_driver.o new file mode 100644 index 0000000..413ffe0 Binary files /dev/null and b/build/default/production/_ext/480578934/clksys_driver.o differ diff --git a/build/default/production/_ext/480578934/clksys_driver.o.d b/build/default/production/_ext/480578934/clksys_driver.o.d new file mode 100644 index 0000000..fd40012 --- /dev/null +++ b/build/default/production/_ext/480578934/clksys_driver.o.d @@ -0,0 +1,87 @@ +build/default/production/_ext/480578934/clksys_driver.o.d \ + build/default/production/_ext/480578934/clksys_driver.o: \ + ../RDS_Encoder.X/src/drivers/clksys_driver.c \ + ../RDS_Encoder.X/src/drivers/clksys_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/drivers/../Si5351A/Si5351A.h + +../RDS_Encoder.X/src/drivers/clksys_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/drivers/../Si5351A/Si5351A.h: diff --git a/build/default/production/_ext/480578934/dac_driver.o b/build/default/production/_ext/480578934/dac_driver.o new file mode 100644 index 0000000..82669df Binary files /dev/null and b/build/default/production/_ext/480578934/dac_driver.o differ diff --git a/build/default/production/_ext/480578934/dac_driver.o.d b/build/default/production/_ext/480578934/dac_driver.o.d new file mode 100644 index 0000000..94b763a --- /dev/null +++ b/build/default/production/_ext/480578934/dac_driver.o.d @@ -0,0 +1,84 @@ +build/default/production/_ext/480578934/dac_driver.o.d \ + build/default/production/_ext/480578934/dac_driver.o: \ + ../RDS_Encoder.X/src/drivers/dac_driver.c \ + ../RDS_Encoder.X/src/drivers/dac_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/dac_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/production/_ext/480578934/dma_driver.o b/build/default/production/_ext/480578934/dma_driver.o new file mode 100644 index 0000000..09f107f Binary files /dev/null and b/build/default/production/_ext/480578934/dma_driver.o differ diff --git a/build/default/production/_ext/480578934/dma_driver.o.d b/build/default/production/_ext/480578934/dma_driver.o.d new file mode 100644 index 0000000..9b5b046 --- /dev/null +++ b/build/default/production/_ext/480578934/dma_driver.o.d @@ -0,0 +1,84 @@ +build/default/production/_ext/480578934/dma_driver.o.d \ + build/default/production/_ext/480578934/dma_driver.o: \ + ../RDS_Encoder.X/src/drivers/dma_driver.c \ + ../RDS_Encoder.X/src/drivers/dma_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/dma_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/production/_ext/480578934/port_driver.o b/build/default/production/_ext/480578934/port_driver.o new file mode 100644 index 0000000..9942ddb Binary files /dev/null and b/build/default/production/_ext/480578934/port_driver.o differ diff --git a/build/default/production/_ext/480578934/port_driver.o.d b/build/default/production/_ext/480578934/port_driver.o.d new file mode 100644 index 0000000..aa6c1c4 --- /dev/null +++ b/build/default/production/_ext/480578934/port_driver.o.d @@ -0,0 +1,84 @@ +build/default/production/_ext/480578934/port_driver.o.d \ + build/default/production/_ext/480578934/port_driver.o: \ + ../RDS_Encoder.X/src/drivers/port_driver.c \ + ../RDS_Encoder.X/src/drivers/port_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/port_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/production/_ext/480578934/twi_driver.o b/build/default/production/_ext/480578934/twi_driver.o new file mode 100644 index 0000000..db12776 Binary files /dev/null and b/build/default/production/_ext/480578934/twi_driver.o differ diff --git a/build/default/production/_ext/480578934/twi_driver.o.d b/build/default/production/_ext/480578934/twi_driver.o.d new file mode 100644 index 0000000..d2cd925 --- /dev/null +++ b/build/default/production/_ext/480578934/twi_driver.o.d @@ -0,0 +1,87 @@ +build/default/production/_ext/480578934/twi_driver.o.d \ + build/default/production/_ext/480578934/twi_driver.o: \ + ../RDS_Encoder.X/src/drivers/twi_driver.c \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/drivers/twi_driver.h \ + ../RDS_Encoder.X/src/drivers/../config.h + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/drivers/twi_driver.h: + +../RDS_Encoder.X/src/drivers/../config.h: diff --git a/build/default/production/_ext/480578934/usart_driver.o b/build/default/production/_ext/480578934/usart_driver.o new file mode 100644 index 0000000..47c3dfd Binary files /dev/null and b/build/default/production/_ext/480578934/usart_driver.o differ diff --git a/build/default/production/_ext/480578934/usart_driver.o.d b/build/default/production/_ext/480578934/usart_driver.o.d new file mode 100644 index 0000000..0f55ab7 --- /dev/null +++ b/build/default/production/_ext/480578934/usart_driver.o.d @@ -0,0 +1,84 @@ +build/default/production/_ext/480578934/usart_driver.o.d \ + build/default/production/_ext/480578934/usart_driver.o: \ + ../RDS_Encoder.X/src/drivers/usart_driver.c \ + ../RDS_Encoder.X/src/drivers/usart_driver.h \ + ../RDS_Encoder.X/src/drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/drivers/../config.h \ + ../RDS_Encoder.X/src/drivers/../rds/rds.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +../RDS_Encoder.X/src/drivers/usart_driver.h: + +../RDS_Encoder.X/src/drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/drivers/../config.h: + +../RDS_Encoder.X/src/drivers/../rds/rds.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/build/default/production/_ext/700402368/dac.o b/build/default/production/_ext/700402368/dac.o new file mode 100644 index 0000000..60b5744 Binary files /dev/null and b/build/default/production/_ext/700402368/dac.o differ diff --git a/build/default/production/_ext/700402368/dac.o.d b/build/default/production/_ext/700402368/dac.o.d new file mode 100644 index 0000000..f5ab48b --- /dev/null +++ b/build/default/production/_ext/700402368/dac.o.d @@ -0,0 +1,101 @@ +build/default/production/_ext/700402368/dac.o.d \ + build/default/production/_ext/700402368/dac.o: \ + ../RDS_Encoder.X/src/rds/dac.c \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/rds/../drivers/dma_driver.h \ + ../RDS_Encoder.X/src/rds/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/rds/../drivers/../config.h \ + ../RDS_Encoder.X/src/rds/../drivers/../rds/rds.h \ + ../RDS_Encoder.X/src/rds/../drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/rds/dac.h ../RDS_Encoder.X/src/rds/../config.h \ + ../RDS_Encoder.X/src/rds/waves.h \ + ../RDS_Encoder.X/src/rds/../drivers/dac_driver.h \ + ../RDS_Encoder.X/src/rds/../rds/rds.h \ + ../RDS_Encoder.X/src/rds/../ports.h + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/rds/../drivers/dma_driver.h: + +../RDS_Encoder.X/src/rds/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/rds/../drivers/../config.h: + +../RDS_Encoder.X/src/rds/../drivers/../rds/rds.h: + +../RDS_Encoder.X/src/rds/../drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/rds/dac.h: + +../RDS_Encoder.X/src/rds/../config.h: + +../RDS_Encoder.X/src/rds/waves.h: + +../RDS_Encoder.X/src/rds/../drivers/dac_driver.h: + +../RDS_Encoder.X/src/rds/../rds/rds.h: + +../RDS_Encoder.X/src/rds/../ports.h: diff --git a/build/default/production/_ext/700402368/rds.o b/build/default/production/_ext/700402368/rds.o new file mode 100644 index 0000000..fd2313c Binary files /dev/null and b/build/default/production/_ext/700402368/rds.o differ diff --git a/build/default/production/_ext/700402368/rds.o.d b/build/default/production/_ext/700402368/rds.o.d new file mode 100644 index 0000000..636461b --- /dev/null +++ b/build/default/production/_ext/700402368/rds.o.d @@ -0,0 +1,117 @@ +build/default/production/_ext/700402368/rds.o.d \ + build/default/production/_ext/700402368/rds.o: \ + ../RDS_Encoder.X/src/rds/rds.c \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\time.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\sys\time.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\eeprom.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h \ + F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h \ + ../RDS_Encoder.X/src/rds/rds.h ../RDS_Encoder.X/src/rds/../uecp/usart.h \ + ../RDS_Encoder.X/src/rds/../uecp/../drivers/usart_driver.h \ + ../RDS_Encoder.X/src/rds/../uecp/../drivers/../avr_compiler.h \ + ../RDS_Encoder.X/src/rds/../uecp/../drivers/../config.h \ + ../RDS_Encoder.X/src/rds/../uecp/../drivers/../rds/rds.h \ + ../RDS_Encoder.X/src/rds/../uecp/../drivers/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h \ + ../RDS_Encoder.X/src/rds/../uecp/../avr_compiler.h \ + ../RDS_Encoder.X/src/rds/../uecp/../config.h \ + ../RDS_Encoder.X/src/rds/../uecp/uecp.h ../RDS_Encoder.X/src/rds/waves.h \ + ../RDS_Encoder.X/src/rds/../config.h ../RDS_Encoder.X/src/rds/../ports.h + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdlib.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\string.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\time.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\sys\time.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\eeprom.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\io.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\sfr_defs.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\inttypes.h: + +F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54/xc8/avr/include/avr/iox128a1u.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\portpins.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\common.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\xmega.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\fuse.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\lock.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stddef.h: + +../RDS_Encoder.X/src/rds/rds.h: + +../RDS_Encoder.X/src/rds/../uecp/usart.h: + +../RDS_Encoder.X/src/rds/../uecp/../drivers/usart_driver.h: + +../RDS_Encoder.X/src/rds/../uecp/../drivers/../avr_compiler.h: + +../RDS_Encoder.X/src/rds/../uecp/../drivers/../config.h: + +../RDS_Encoder.X/src/rds/../uecp/../drivers/../rds/rds.h: + +../RDS_Encoder.X/src/rds/../uecp/../drivers/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\interrupt.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\avr\pgmspace.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\util\delay_basic.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: + +../RDS_Encoder.X/src/rds/../uecp/../avr_compiler.h: + +../RDS_Encoder.X/src/rds/../uecp/../config.h: + +../RDS_Encoder.X/src/rds/../uecp/uecp.h: + +../RDS_Encoder.X/src/rds/waves.h: + +../RDS_Encoder.X/src/rds/../config.h: + +../RDS_Encoder.X/src/rds/../ports.h: diff --git a/build/default/production/_ext/700402368/waves.o b/build/default/production/_ext/700402368/waves.o new file mode 100644 index 0000000..9ba11b6 Binary files /dev/null and b/build/default/production/_ext/700402368/waves.o differ diff --git a/build/default/production/_ext/700402368/waves.o.d b/build/default/production/_ext/700402368/waves.o.d new file mode 100644 index 0000000..8dfeda6 --- /dev/null +++ b/build/default/production/_ext/700402368/waves.o.d @@ -0,0 +1,38 @@ +build/default/production/_ext/700402368/waves.o.d \ + build/default/production/_ext/700402368/waves.o: \ + ../RDS_Encoder.X/src/rds/waves.c \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h \ + ../RDS_Encoder.X/src/rds/waves.h ../RDS_Encoder.X/src/rds/../config.h \ + ../RDS_Encoder.X/src/rds/../rds/rds.h \ + ../RDS_Encoder.X/src/rds/../uecp/uecp.h \ + c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h \ + c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdint.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\alltypes.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\bits\stdint.h: + +../RDS_Encoder.X/src/rds/waves.h: + +../RDS_Encoder.X/src/rds/../config.h: + +../RDS_Encoder.X/src/rds/../rds/rds.h: + +../RDS_Encoder.X/src/rds/../uecp/uecp.h: + +c:\program\ files\microchip\xc8\v2.36\avr\lib\gcc\avr\5.4.0\include\stdbool.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\stdio.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\features.h: + +c:\program\ files\microchip\xc8\v2.36\avr\avr\include\math.h: diff --git a/defmplabxtrace.log b/defmplabxtrace.log new file mode 100644 index 0000000..e69de29 diff --git a/defmplabxtrace.log.inx b/defmplabxtrace.log.inx new file mode 100644 index 0000000..29197e3 Binary files /dev/null and b/defmplabxtrace.log.inx differ diff --git a/dist/default/debug/RDS_Encoder.X.debug.elf b/dist/default/debug/RDS_Encoder.X.debug.elf new file mode 100644 index 0000000..fd0cc3a Binary files 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a/dist/default/production/memoryfile.xml b/dist/default/production/memoryfile.xml new file mode 100644 index 0000000..28792ad --- /dev/null +++ b/dist/default/production/memoryfile.xml @@ -0,0 +1,17 @@ + + + + + bytes + 139264 + 21543 + 117721 + + + bytes + 8192 + 3244 + 4948 + + + diff --git a/nbproject/Makefile-default.mk b/nbproject/Makefile-default.mk new file mode 100644 index 0000000..46357ad --- /dev/null +++ b/nbproject/Makefile-default.mk @@ -0,0 +1,314 @@ +# +# Generated Makefile - do not edit! +# +# Edit the Makefile in the project folder instead (../Makefile). Each target +# has a -pre and a -post target defined where you can add customized code. +# +# This makefile implements configuration specific macros and targets. + + +# Include project Makefile +ifeq "${IGNORE_LOCAL}" "TRUE" +# do not include local makefile. User is passing all local related variables already +else +include Makefile +# Include makefile containing local settings +ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk" +include nbproject/Makefile-local-default.mk +endif +endif + +# Environment +MKDIR=gnumkdir -p +RM=rm -f +MV=mv +CP=cp + +# Macros +CND_CONF=default +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +IMAGE_TYPE=debug +OUTPUT_SUFFIX=elf +DEBUGGABLE_SUFFIX=elf +FINAL_IMAGE=${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +else +IMAGE_TYPE=production +OUTPUT_SUFFIX=hex +DEBUGGABLE_SUFFIX=elf +FINAL_IMAGE=${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +endif + +ifeq ($(COMPARE_BUILD), true) +COMPARISON_BUILD=-mafrlcsj +else +COMPARISON_BUILD= +endif + +ifdef SUB_IMAGE_ADDRESS + +else +SUB_IMAGE_ADDRESS_COMMAND= +endif + +# Object Directory +OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE} + +# Distribution Directory +DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE} + +# Source Files Quoted if spaced +SOURCEFILES_QUOTED_IF_SPACED=../RDS_Encoder.X/src/drivers/clksys_driver.c ../RDS_Encoder.X/src/drivers/dac_driver.c ../RDS_Encoder.X/src/drivers/dma_driver.c ../RDS_Encoder.X/src/drivers/port_driver.c ../RDS_Encoder.X/src/drivers/twi_driver.c ../RDS_Encoder.X/src/drivers/usart_driver.c ../RDS_Encoder.X/src/rds/dac.c ../RDS_Encoder.X/src/rds/rds.c ../RDS_Encoder.X/src/rds/waves.c ../RDS_Encoder.X/src/Si5351A/Si5351A.c ../RDS_Encoder.X/src/uecp/uecp.c ../RDS_Encoder.X/src/uecp/usart.c ../RDS_Encoder.X/src/main.c ../RDS_Encoder.X/src/ports.c + +# Object Files Quoted if spaced +OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/480578934/clksys_driver.o ${OBJECTDIR}/_ext/480578934/dac_driver.o ${OBJECTDIR}/_ext/480578934/dma_driver.o ${OBJECTDIR}/_ext/480578934/port_driver.o ${OBJECTDIR}/_ext/480578934/twi_driver.o ${OBJECTDIR}/_ext/480578934/usart_driver.o ${OBJECTDIR}/_ext/700402368/dac.o ${OBJECTDIR}/_ext/700402368/rds.o ${OBJECTDIR}/_ext/700402368/waves.o ${OBJECTDIR}/_ext/1303998032/Si5351A.o ${OBJECTDIR}/_ext/237546978/uecp.o ${OBJECTDIR}/_ext/237546978/usart.o ${OBJECTDIR}/_ext/1065973326/main.o ${OBJECTDIR}/_ext/1065973326/ports.o +POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/480578934/clksys_driver.o.d ${OBJECTDIR}/_ext/480578934/dac_driver.o.d ${OBJECTDIR}/_ext/480578934/dma_driver.o.d ${OBJECTDIR}/_ext/480578934/port_driver.o.d ${OBJECTDIR}/_ext/480578934/twi_driver.o.d ${OBJECTDIR}/_ext/480578934/usart_driver.o.d ${OBJECTDIR}/_ext/700402368/dac.o.d ${OBJECTDIR}/_ext/700402368/rds.o.d ${OBJECTDIR}/_ext/700402368/waves.o.d ${OBJECTDIR}/_ext/1303998032/Si5351A.o.d ${OBJECTDIR}/_ext/237546978/uecp.o.d ${OBJECTDIR}/_ext/237546978/usart.o.d ${OBJECTDIR}/_ext/1065973326/main.o.d ${OBJECTDIR}/_ext/1065973326/ports.o.d + +# Object Files +OBJECTFILES=${OBJECTDIR}/_ext/480578934/clksys_driver.o ${OBJECTDIR}/_ext/480578934/dac_driver.o ${OBJECTDIR}/_ext/480578934/dma_driver.o ${OBJECTDIR}/_ext/480578934/port_driver.o ${OBJECTDIR}/_ext/480578934/twi_driver.o ${OBJECTDIR}/_ext/480578934/usart_driver.o ${OBJECTDIR}/_ext/700402368/dac.o ${OBJECTDIR}/_ext/700402368/rds.o ${OBJECTDIR}/_ext/700402368/waves.o ${OBJECTDIR}/_ext/1303998032/Si5351A.o ${OBJECTDIR}/_ext/237546978/uecp.o ${OBJECTDIR}/_ext/237546978/usart.o ${OBJECTDIR}/_ext/1065973326/main.o ${OBJECTDIR}/_ext/1065973326/ports.o + +# Source Files +SOURCEFILES=../RDS_Encoder.X/src/drivers/clksys_driver.c ../RDS_Encoder.X/src/drivers/dac_driver.c ../RDS_Encoder.X/src/drivers/dma_driver.c ../RDS_Encoder.X/src/drivers/port_driver.c ../RDS_Encoder.X/src/drivers/twi_driver.c ../RDS_Encoder.X/src/drivers/usart_driver.c ../RDS_Encoder.X/src/rds/dac.c ../RDS_Encoder.X/src/rds/rds.c ../RDS_Encoder.X/src/rds/waves.c ../RDS_Encoder.X/src/Si5351A/Si5351A.c ../RDS_Encoder.X/src/uecp/uecp.c ../RDS_Encoder.X/src/uecp/usart.c ../RDS_Encoder.X/src/main.c ../RDS_Encoder.X/src/ports.c + + + +CFLAGS= +ASFLAGS= +LDLIBSOPTIONS= + +############# Tool locations ########################################## +# If you copy a project from one host to another, the path where the # +# compiler is installed may be different. # +# If you open this project with MPLAB X in the new host, this # +# makefile will be regenerated and the paths will be corrected. # +####################################################################### +# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build +FIXDEPS=fixDeps + +.build-conf: ${BUILD_SUBPROJECTS} +ifneq ($(INFORMATION_MESSAGE), ) + @echo $(INFORMATION_MESSAGE) +endif + ${MAKE} -f nbproject/Makefile-default.mk ${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} + +MP_PROCESSOR_OPTION=ATxmega128A1U +# ------------------------------------------------------------------------------------ +# Rules for buildStep: compile +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +${OBJECTDIR}/_ext/480578934/clksys_driver.o: ../RDS_Encoder.X/src/drivers/clksys_driver.c .generated_files/flags/default/40ee358cf9fbfd7cb5a3c6afac8e525a413ba2bd .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/clksys_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/clksys_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/clksys_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/clksys_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/clksys_driver.o -o ${OBJECTDIR}/_ext/480578934/clksys_driver.o ../RDS_Encoder.X/src/drivers/clksys_driver.c + +${OBJECTDIR}/_ext/480578934/dac_driver.o: ../RDS_Encoder.X/src/drivers/dac_driver.c .generated_files/flags/default/e81396bf52f92cccc0bd7722de509678d141f83f .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/dac_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/dac_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/dac_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/dac_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/dac_driver.o -o ${OBJECTDIR}/_ext/480578934/dac_driver.o ../RDS_Encoder.X/src/drivers/dac_driver.c + +${OBJECTDIR}/_ext/480578934/dma_driver.o: ../RDS_Encoder.X/src/drivers/dma_driver.c .generated_files/flags/default/e1943c143250bdec73805a6f4d9b37b5c496705f .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/dma_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/dma_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/dma_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/dma_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/dma_driver.o -o ${OBJECTDIR}/_ext/480578934/dma_driver.o ../RDS_Encoder.X/src/drivers/dma_driver.c + +${OBJECTDIR}/_ext/480578934/port_driver.o: ../RDS_Encoder.X/src/drivers/port_driver.c .generated_files/flags/default/9332395a63a610f1051f52bd9b73bf7507d018c9 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/port_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/port_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/port_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/port_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/port_driver.o -o ${OBJECTDIR}/_ext/480578934/port_driver.o ../RDS_Encoder.X/src/drivers/port_driver.c + +${OBJECTDIR}/_ext/480578934/twi_driver.o: ../RDS_Encoder.X/src/drivers/twi_driver.c .generated_files/flags/default/66d35063743e053b20a8c6a73e773f7bc5364808 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/twi_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/twi_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/twi_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/twi_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/twi_driver.o -o ${OBJECTDIR}/_ext/480578934/twi_driver.o ../RDS_Encoder.X/src/drivers/twi_driver.c + +${OBJECTDIR}/_ext/480578934/usart_driver.o: ../RDS_Encoder.X/src/drivers/usart_driver.c .generated_files/flags/default/fbf1ac7a9ea8c9701fe74bfe2a92f25f709cb21 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/usart_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/usart_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/usart_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/usart_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/usart_driver.o -o ${OBJECTDIR}/_ext/480578934/usart_driver.o ../RDS_Encoder.X/src/drivers/usart_driver.c + +${OBJECTDIR}/_ext/700402368/dac.o: ../RDS_Encoder.X/src/rds/dac.c .generated_files/flags/default/48286a61e710f3b3ee3a6cf9a3e53edce47cdcf9 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/700402368" + @${RM} ${OBJECTDIR}/_ext/700402368/dac.o.d + @${RM} ${OBJECTDIR}/_ext/700402368/dac.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/700402368/dac.o.d" -MT "${OBJECTDIR}/_ext/700402368/dac.o.d" -MT ${OBJECTDIR}/_ext/700402368/dac.o -o ${OBJECTDIR}/_ext/700402368/dac.o ../RDS_Encoder.X/src/rds/dac.c + +${OBJECTDIR}/_ext/700402368/rds.o: ../RDS_Encoder.X/src/rds/rds.c .generated_files/flags/default/4f698cc965e4a2ec8e5888a97f4be5ec9ad8ab96 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/700402368" + @${RM} ${OBJECTDIR}/_ext/700402368/rds.o.d + @${RM} ${OBJECTDIR}/_ext/700402368/rds.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/700402368/rds.o.d" -MT "${OBJECTDIR}/_ext/700402368/rds.o.d" -MT ${OBJECTDIR}/_ext/700402368/rds.o -o ${OBJECTDIR}/_ext/700402368/rds.o ../RDS_Encoder.X/src/rds/rds.c + +${OBJECTDIR}/_ext/700402368/waves.o: ../RDS_Encoder.X/src/rds/waves.c .generated_files/flags/default/17be92f4735b95bd850e870c0dc43db46694f8e8 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/700402368" + @${RM} ${OBJECTDIR}/_ext/700402368/waves.o.d + @${RM} ${OBJECTDIR}/_ext/700402368/waves.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/700402368/waves.o.d" -MT "${OBJECTDIR}/_ext/700402368/waves.o.d" -MT ${OBJECTDIR}/_ext/700402368/waves.o -o ${OBJECTDIR}/_ext/700402368/waves.o ../RDS_Encoder.X/src/rds/waves.c + +${OBJECTDIR}/_ext/1303998032/Si5351A.o: ../RDS_Encoder.X/src/Si5351A/Si5351A.c .generated_files/flags/default/952bf3a22822ab27a53c550874853f1340c4c3ae .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/1303998032" + @${RM} ${OBJECTDIR}/_ext/1303998032/Si5351A.o.d + @${RM} ${OBJECTDIR}/_ext/1303998032/Si5351A.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/1303998032/Si5351A.o.d" -MT "${OBJECTDIR}/_ext/1303998032/Si5351A.o.d" -MT ${OBJECTDIR}/_ext/1303998032/Si5351A.o -o ${OBJECTDIR}/_ext/1303998032/Si5351A.o ../RDS_Encoder.X/src/Si5351A/Si5351A.c + +${OBJECTDIR}/_ext/237546978/uecp.o: ../RDS_Encoder.X/src/uecp/uecp.c .generated_files/flags/default/8aae5bc0a330a131f197b24a2ec2384b6df804d1 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/237546978" + @${RM} ${OBJECTDIR}/_ext/237546978/uecp.o.d + @${RM} ${OBJECTDIR}/_ext/237546978/uecp.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/237546978/uecp.o.d" -MT "${OBJECTDIR}/_ext/237546978/uecp.o.d" -MT ${OBJECTDIR}/_ext/237546978/uecp.o -o ${OBJECTDIR}/_ext/237546978/uecp.o ../RDS_Encoder.X/src/uecp/uecp.c + +${OBJECTDIR}/_ext/237546978/usart.o: ../RDS_Encoder.X/src/uecp/usart.c .generated_files/flags/default/5521704e586e98d0b09bd90e00e23c0cc92fbf5a .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/237546978" + @${RM} ${OBJECTDIR}/_ext/237546978/usart.o.d + @${RM} ${OBJECTDIR}/_ext/237546978/usart.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/237546978/usart.o.d" -MT "${OBJECTDIR}/_ext/237546978/usart.o.d" -MT ${OBJECTDIR}/_ext/237546978/usart.o -o ${OBJECTDIR}/_ext/237546978/usart.o ../RDS_Encoder.X/src/uecp/usart.c + +${OBJECTDIR}/_ext/1065973326/main.o: ../RDS_Encoder.X/src/main.c .generated_files/flags/default/664b4e8894a05152fbaf466987ada07b3e65b522 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/1065973326" + @${RM} ${OBJECTDIR}/_ext/1065973326/main.o.d + @${RM} ${OBJECTDIR}/_ext/1065973326/main.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/1065973326/main.o.d" -MT "${OBJECTDIR}/_ext/1065973326/main.o.d" -MT ${OBJECTDIR}/_ext/1065973326/main.o -o ${OBJECTDIR}/_ext/1065973326/main.o ../RDS_Encoder.X/src/main.c + +${OBJECTDIR}/_ext/1065973326/ports.o: ../RDS_Encoder.X/src/ports.c .generated_files/flags/default/c50f5588ba9029bd316c59fac92b7f99aa6109a6 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/1065973326" + @${RM} ${OBJECTDIR}/_ext/1065973326/ports.o.d + @${RM} ${OBJECTDIR}/_ext/1065973326/ports.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -g -DDEBUG -gdwarf-2 -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/1065973326/ports.o.d" -MT "${OBJECTDIR}/_ext/1065973326/ports.o.d" -MT ${OBJECTDIR}/_ext/1065973326/ports.o -o ${OBJECTDIR}/_ext/1065973326/ports.o ../RDS_Encoder.X/src/ports.c + +else +${OBJECTDIR}/_ext/480578934/clksys_driver.o: ../RDS_Encoder.X/src/drivers/clksys_driver.c .generated_files/flags/default/c95867c34aed8fa55281266c54bf195aaab0155e .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/clksys_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/clksys_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/clksys_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/clksys_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/clksys_driver.o -o ${OBJECTDIR}/_ext/480578934/clksys_driver.o ../RDS_Encoder.X/src/drivers/clksys_driver.c + +${OBJECTDIR}/_ext/480578934/dac_driver.o: ../RDS_Encoder.X/src/drivers/dac_driver.c .generated_files/flags/default/823e444bef31acc8cf59c9829c6561ba9065c222 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/dac_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/dac_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/dac_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/dac_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/dac_driver.o -o ${OBJECTDIR}/_ext/480578934/dac_driver.o ../RDS_Encoder.X/src/drivers/dac_driver.c + +${OBJECTDIR}/_ext/480578934/dma_driver.o: ../RDS_Encoder.X/src/drivers/dma_driver.c .generated_files/flags/default/8e6eb26c7903026c850985e977b354d0d419314c .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/dma_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/dma_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/dma_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/dma_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/dma_driver.o -o ${OBJECTDIR}/_ext/480578934/dma_driver.o ../RDS_Encoder.X/src/drivers/dma_driver.c + +${OBJECTDIR}/_ext/480578934/port_driver.o: ../RDS_Encoder.X/src/drivers/port_driver.c .generated_files/flags/default/b9a2220f457223a5d83604ed5e2241885ebe374d .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/port_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/port_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/port_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/port_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/port_driver.o -o ${OBJECTDIR}/_ext/480578934/port_driver.o ../RDS_Encoder.X/src/drivers/port_driver.c + +${OBJECTDIR}/_ext/480578934/twi_driver.o: ../RDS_Encoder.X/src/drivers/twi_driver.c .generated_files/flags/default/4151d3122bc2e1ee2ce44b270126e33fecfee726 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/twi_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/twi_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/twi_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/twi_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/twi_driver.o -o ${OBJECTDIR}/_ext/480578934/twi_driver.o ../RDS_Encoder.X/src/drivers/twi_driver.c + +${OBJECTDIR}/_ext/480578934/usart_driver.o: ../RDS_Encoder.X/src/drivers/usart_driver.c .generated_files/flags/default/4f8a429b4c2d4e3ce3e6613c04577021db68efa2 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/480578934" + @${RM} ${OBJECTDIR}/_ext/480578934/usart_driver.o.d + @${RM} ${OBJECTDIR}/_ext/480578934/usart_driver.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/480578934/usart_driver.o.d" -MT "${OBJECTDIR}/_ext/480578934/usart_driver.o.d" -MT ${OBJECTDIR}/_ext/480578934/usart_driver.o -o ${OBJECTDIR}/_ext/480578934/usart_driver.o ../RDS_Encoder.X/src/drivers/usart_driver.c + +${OBJECTDIR}/_ext/700402368/dac.o: ../RDS_Encoder.X/src/rds/dac.c .generated_files/flags/default/6935891923e7d4fa33694cf7fa1bf221f8420493 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/700402368" + @${RM} ${OBJECTDIR}/_ext/700402368/dac.o.d + @${RM} ${OBJECTDIR}/_ext/700402368/dac.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/700402368/dac.o.d" -MT "${OBJECTDIR}/_ext/700402368/dac.o.d" -MT ${OBJECTDIR}/_ext/700402368/dac.o -o ${OBJECTDIR}/_ext/700402368/dac.o ../RDS_Encoder.X/src/rds/dac.c + +${OBJECTDIR}/_ext/700402368/rds.o: ../RDS_Encoder.X/src/rds/rds.c .generated_files/flags/default/e2f7cd72008582f0c414bc1aca61991c853e1053 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/700402368" + @${RM} ${OBJECTDIR}/_ext/700402368/rds.o.d + @${RM} ${OBJECTDIR}/_ext/700402368/rds.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/700402368/rds.o.d" -MT "${OBJECTDIR}/_ext/700402368/rds.o.d" -MT ${OBJECTDIR}/_ext/700402368/rds.o -o ${OBJECTDIR}/_ext/700402368/rds.o ../RDS_Encoder.X/src/rds/rds.c + +${OBJECTDIR}/_ext/700402368/waves.o: ../RDS_Encoder.X/src/rds/waves.c .generated_files/flags/default/6f203df865725733d1bee91678ac992fe0cae722 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/700402368" + @${RM} ${OBJECTDIR}/_ext/700402368/waves.o.d + @${RM} ${OBJECTDIR}/_ext/700402368/waves.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/700402368/waves.o.d" -MT "${OBJECTDIR}/_ext/700402368/waves.o.d" -MT ${OBJECTDIR}/_ext/700402368/waves.o -o ${OBJECTDIR}/_ext/700402368/waves.o ../RDS_Encoder.X/src/rds/waves.c + +${OBJECTDIR}/_ext/1303998032/Si5351A.o: ../RDS_Encoder.X/src/Si5351A/Si5351A.c .generated_files/flags/default/b713ea3e6147330ed0409c0757a421f13bdb214e .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/1303998032" + @${RM} ${OBJECTDIR}/_ext/1303998032/Si5351A.o.d + @${RM} ${OBJECTDIR}/_ext/1303998032/Si5351A.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/1303998032/Si5351A.o.d" -MT "${OBJECTDIR}/_ext/1303998032/Si5351A.o.d" -MT ${OBJECTDIR}/_ext/1303998032/Si5351A.o -o ${OBJECTDIR}/_ext/1303998032/Si5351A.o ../RDS_Encoder.X/src/Si5351A/Si5351A.c + +${OBJECTDIR}/_ext/237546978/uecp.o: ../RDS_Encoder.X/src/uecp/uecp.c .generated_files/flags/default/d4fe7cd17bc9eaee2491420854262635d4af3f4b .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/237546978" + @${RM} ${OBJECTDIR}/_ext/237546978/uecp.o.d + @${RM} ${OBJECTDIR}/_ext/237546978/uecp.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/237546978/uecp.o.d" -MT "${OBJECTDIR}/_ext/237546978/uecp.o.d" -MT ${OBJECTDIR}/_ext/237546978/uecp.o -o ${OBJECTDIR}/_ext/237546978/uecp.o ../RDS_Encoder.X/src/uecp/uecp.c + +${OBJECTDIR}/_ext/237546978/usart.o: ../RDS_Encoder.X/src/uecp/usart.c .generated_files/flags/default/6388cbe67fc58e3f25058aef5c10d2f50f905bf8 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/237546978" + @${RM} ${OBJECTDIR}/_ext/237546978/usart.o.d + @${RM} ${OBJECTDIR}/_ext/237546978/usart.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/237546978/usart.o.d" -MT "${OBJECTDIR}/_ext/237546978/usart.o.d" -MT ${OBJECTDIR}/_ext/237546978/usart.o -o ${OBJECTDIR}/_ext/237546978/usart.o ../RDS_Encoder.X/src/uecp/usart.c + +${OBJECTDIR}/_ext/1065973326/main.o: ../RDS_Encoder.X/src/main.c .generated_files/flags/default/6e131afbca614e9f2695200b051a756427f0aaba .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/1065973326" + @${RM} ${OBJECTDIR}/_ext/1065973326/main.o.d + @${RM} ${OBJECTDIR}/_ext/1065973326/main.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/1065973326/main.o.d" -MT "${OBJECTDIR}/_ext/1065973326/main.o.d" -MT ${OBJECTDIR}/_ext/1065973326/main.o -o ${OBJECTDIR}/_ext/1065973326/main.o ../RDS_Encoder.X/src/main.c + +${OBJECTDIR}/_ext/1065973326/ports.o: ../RDS_Encoder.X/src/ports.c .generated_files/flags/default/347b2cfef1a567398f98d57cd97d9b86b10c094 .generated_files/flags/default/f67cfa35124ce25c61ddeec3eae1f5c7ce9c600f + @${MKDIR} "${OBJECTDIR}/_ext/1065973326" + @${RM} ${OBJECTDIR}/_ext/1065973326/ports.o.d + @${RM} ${OBJECTDIR}/_ext/1065973326/ports.o + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -x c -D__$(MP_PROCESSOR_OPTION)__ -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -DXPRJ_default=$(CND_CONF) $(COMPARISON_BUILD) -gdwarf-3 -Wno-pointer-to-int-cast -MD -MP -MF "${OBJECTDIR}/_ext/1065973326/ports.o.d" -MT "${OBJECTDIR}/_ext/1065973326/ports.o.d" -MT ${OBJECTDIR}/_ext/1065973326/ports.o -o ${OBJECTDIR}/_ext/1065973326/ports.o ../RDS_Encoder.X/src/ports.c + +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: assemble +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +else +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: assembleWithPreprocess +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +else +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: link +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} ${DISTDIR} + ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.map -D__DEBUG=1 -DXPRJ_default=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -gdwarf-2 -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -gdwarf-3 $(COMPARISON_BUILD) -Wl,--memorysummary,${DISTDIR}/memoryfile.xml -o ${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o ${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1 + @${RM} ${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.hex + +else +${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} ${DISTDIR} + ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.map -DXPRJ_default=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -Wl,--gc-sections -O2 -Og -ffunction-sections -fdata-sections -fshort-enums -fno-common -funsigned-char -funsigned-bitfields -mext=cci -Wall -gdwarf-3 $(COMPARISON_BUILD) -Wl,--memorysummary,${DISTDIR}/memoryfile.xml -o ${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} -o ${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} -Wl,--start-group -Wl,-lm -Wl,--end-group + ${MP_CC_DIR}\\avr-objcopy -O ihex "${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}" "${DISTDIR}/RDS_Encoder.X.${IMAGE_TYPE}.hex" +endif + + +# Subprojects +.build-subprojects: + + +# Subprojects +.clean-subprojects: + +# Clean Targets +.clean-conf: ${CLEAN_SUBPROJECTS} + ${RM} -r ${OBJECTDIR} + ${RM} -r ${DISTDIR} + +# Enable dependency checking +.dep.inc: .depcheck-impl + +DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES}) +ifneq (${DEPFILES},) +include ${DEPFILES} +endif diff --git a/nbproject/Makefile-genesis.properties b/nbproject/Makefile-genesis.properties new file mode 100644 index 0000000..423f748 --- /dev/null +++ b/nbproject/Makefile-genesis.properties @@ -0,0 +1,14 @@ +# +#Wed Mar 27 14:23:30 MSK 2024 +default.languagetoolchain.version=2.36 +default.Pack.dfplocation=F\:\\Programm\\packs\\Microchip\\XMEGAA_DFP\\2.2.54 +conf.ids=default +default.languagetoolchain.dir=C\:\\Program Files\\Microchip\\xc8\\v2.36\\bin +host.id=1aqr-h4ly-3f +configurations-xml=187e8f4bec4e93169673e0d959028e5d +com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=6e02ca5e9f5042ffd365b42ab82d3a9b +user-defined-mime-resolver-xml=none +default.com-microchip-mplab-nbide-toolchain-xc8-XC8LanguageToolchain.md5=ab1e0737b447a24f7366e9fd8fe5a2f0 +proj.dir=C\:\\Users\\Sutor\\MPLABXProjects\\RDS_Encoder.X +default.com-microchip-mplab-mdbcore-pk4hybrid-Pk4HybridTooImpl.md5=12c9a46bd95f04a1118c0f23fa66f7c4 +host.platform=windows diff --git a/nbproject/Makefile-impl.mk b/nbproject/Makefile-impl.mk new file mode 100644 index 0000000..d5382b6 --- /dev/null +++ b/nbproject/Makefile-impl.mk @@ -0,0 +1,69 @@ +# +# Generated Makefile - do not edit! +# +# Edit the Makefile in the project folder instead (../Makefile). Each target +# has a pre- and a post- target defined where you can add customization code. +# +# This makefile implements macros and targets common to all configurations. +# +# NOCDDL + + +# Building and Cleaning subprojects are done by default, but can be controlled with the SUB +# macro. If SUB=no, subprojects will not be built or cleaned. The following macro +# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf +# and .clean-reqprojects-conf unless SUB has the value 'no' +SUB_no=NO +SUBPROJECTS=${SUB_${SUB}} +BUILD_SUBPROJECTS_=.build-subprojects +BUILD_SUBPROJECTS_NO= +BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}} +CLEAN_SUBPROJECTS_=.clean-subprojects +CLEAN_SUBPROJECTS_NO= +CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}} + + +# Project Name +PROJECTNAME=RDS_Encoder.X + +# Active Configuration +DEFAULTCONF=default +CONF=${DEFAULTCONF} + +# All Configurations +ALLCONFS=default + + +# build +.build-impl: .build-pre + ${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf + + +# clean +.clean-impl: .clean-pre + ${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf + +# clobber +.clobber-impl: .clobber-pre .depcheck-impl + ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean + + + +# all +.all-impl: .all-pre .depcheck-impl + ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build + + + +# dependency checking support +.depcheck-impl: +# @echo "# This code depends on make tool being used" >.dep.inc +# @if [ -n "${MAKE_VERSION}" ]; then \ +# echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \ +# echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \ +# echo "include \$${DEPFILES}" >>.dep.inc; \ +# echo "endif" >>.dep.inc; \ +# else \ +# echo ".KEEP_STATE:" >>.dep.inc; \ +# echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \ +# fi diff --git a/nbproject/Makefile-local-default.mk b/nbproject/Makefile-local-default.mk new file mode 100644 index 0000000..423b4fe --- /dev/null +++ b/nbproject/Makefile-local-default.mk @@ -0,0 +1,38 @@ +# +# Generated Makefile - do not edit! +# +# +# This file contains information about the location of compilers and other tools. +# If you commmit this file into your revision control server, you will be able to +# to checkout the project and build it from the command line with make. However, +# if more than one person works on the same project, then this file might show +# conflicts since different users are bound to have compilers in different places. +# In that case you might choose to not commit this file and let MPLAB X recreate this file +# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at +# least once so the file gets created and the project can be built. Finally, you can also +# avoid using this file at all if you are only building from the command line with make. +# You can invoke make with the values of the macros: +# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ... +# +SHELL=cmd.exe +PATH_TO_IDE_BIN=F:/Programm/mplab_platform/platform/../mplab_ide/modules/../../bin/ +# Adding MPLAB X bin directory to path. +PATH:=F:/Programm/mplab_platform/platform/../mplab_ide/modules/../../bin/:$(PATH) +# Path to java used to run MPLAB X when this makefile was created +MP_JAVA_PATH="F:\Programm\sys\java\zulu8.54.0.21-ca-fx-jre8.0.292-win_x64/bin/" +OS_CURRENT="$(shell uname -s)" +MP_CC="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-cc.exe" +# MP_CPPC is not defined +# MP_BC is not defined +MP_AS="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-cc.exe" +MP_LD="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-cc.exe" +MP_AR="C:\Program Files\Microchip\xc8\v2.36\bin\xc8-ar.exe" +DEP_GEN=${MP_JAVA_PATH}java -jar "F:/Programm/mplab_platform/platform/../mplab_ide/modules/../../bin/extractobjectdependencies.jar" +MP_CC_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +# MP_CPPC_DIR is not defined +# MP_BC_DIR is not defined +MP_AS_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +MP_LD_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +MP_AR_DIR="C:\Program Files\Microchip\xc8\v2.36\bin" +# MP_BC_DIR is not defined +DFP_DIR=F:/Programm/packs/Microchip/XMEGAA_DFP/2.2.54 diff --git a/nbproject/Makefile-variables.mk b/nbproject/Makefile-variables.mk new file mode 100644 index 0000000..20ba75e --- /dev/null +++ b/nbproject/Makefile-variables.mk @@ -0,0 +1,10 @@ +# +# Generated - do not edit! +# +# NOCDDL +# +CND_BASEDIR=`pwd` +# default configuration +CND_ARTIFACT_DIR_default=dist/default/production +CND_ARTIFACT_NAME_default=RDS_Encoder.X.production.hex +CND_ARTIFACT_PATH_default=dist/default/production/RDS_Encoder.X.production.hex diff --git a/nbproject/configurations.xml b/nbproject/configurations.xml new file mode 100644 index 0000000..d76484e --- /dev/null +++ b/nbproject/configurations.xml @@ -0,0 +1,338 @@ + + + + + + ../RDS_Encoder.X/src/drivers/clksys_driver.h + ../RDS_Encoder.X/src/drivers/dac_driver.h + ../RDS_Encoder.X/src/drivers/dma_driver.h + ../RDS_Encoder.X/src/drivers/port_driver.h + ../RDS_Encoder.X/src/drivers/twi_driver.h + ../RDS_Encoder.X/src/drivers/usart_driver.h + + + ../RDS_Encoder.X/src/rds/dac.h + ../RDS_Encoder.X/src/rds/rds.h + ../RDS_Encoder.X/src/rds/waves.h + + + ../RDS_Encoder.X/src/Si5351A/Si5351A-RevB-Registers.h + ../RDS_Encoder.X/src/Si5351A/Si5351A.h + + + ../RDS_Encoder.X/src/uecp/uecp.h + ../RDS_Encoder.X/src/uecp/usart.h + + ../RDS_Encoder.X/src/avr_compiler.h + ../RDS_Encoder.X/src/config.h + ../RDS_Encoder.X/src/ports.h + + + + + + ../RDS_Encoder.X/src/drivers/clksys_driver.c + ../RDS_Encoder.X/src/drivers/dac_driver.c + ../RDS_Encoder.X/src/drivers/dma_driver.c + ../RDS_Encoder.X/src/drivers/port_driver.c + ../RDS_Encoder.X/src/drivers/twi_driver.c + ../RDS_Encoder.X/src/drivers/usart_driver.c + + + ../RDS_Encoder.X/src/rds/dac.c + ../RDS_Encoder.X/src/rds/rds.c + ../RDS_Encoder.X/src/rds/waves.c + + + ../RDS_Encoder.X/src/Si5351A/Si5351A.c + + + ../RDS_Encoder.X/src/uecp/uecp.c + ../RDS_Encoder.X/src/uecp/usart.c + + ../RDS_Encoder.X/src/main.c + ../RDS_Encoder.X/src/ports.c + + + Makefile + + + + ../RDS_Encoder.X/src + + Makefile + + + + localhost + ATxmega128A1U + + + pk4hybrid + XC8 + 2.36 + 3 + + + + + + + + + + + + + + + false + false + + + + + + + false + false + + false + + false + false + false + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/nbproject/private/.LCKconfigurations.xml~ b/nbproject/private/.LCKconfigurations.xml~ new file mode 100644 index 0000000..7816708 --- /dev/null +++ b/nbproject/private/.LCKconfigurations.xml~ @@ -0,0 +1 @@ +C:\Users\Sutor\MPLABXProjects\RDS_Encoder.X\nbproject\private\configurations.xml \ No newline at end of file diff --git a/nbproject/private/configurations.xml b/nbproject/private/configurations.xml new file mode 100644 index 0000000..ee07bb5 --- /dev/null +++ b/nbproject/private/configurations.xml @@ -0,0 +1,25 @@ + + + Makefile + 0 + + + :=MPLABComm-USB-Microchip:=<vid>03EB:=<pid>2177:=<rev>0100:=<man>Microchip Technology Incorporated:=<prod>MPLAB PICkit 4 CMSIS-DAP:=<sn>BUR213374454:=<drv>x:=<xpt>h:=end + C:\Program Files\Microchip\xc8\v2.36\bin + + place holder 1 + place holder 2 + + + + + true + 0 + 0 + 0 + + + + + + diff --git a/nbproject/private/private.xml b/nbproject/private/private.xml new file mode 100644 index 0000000..ae3c94f --- /dev/null +++ b/nbproject/private/private.xml @@ -0,0 +1,11 @@ + + + + + + file:/C:/Users/Sutor/MPLABXProjects/RDS_Encoder.X/src/rds/rds.c + file:/C:/Users/Sutor/MPLABXProjects/RDS_Encoder.X/src/uecp/uecp.c + file:/C:/Users/Sutor/MPLABXProjects/RDS_Encoder.X/src/main.c + + + diff --git a/nbproject/project.xml b/nbproject/project.xml new file mode 100644 index 0000000..136b5bf --- /dev/null +++ b/nbproject/project.xml @@ -0,0 +1,29 @@ + + + com.microchip.mplab.nbide.embedded.makeproject + + + RDS_Encoder + 89a2a23f-ae39-45a4-9ab4-fe61d506f782 + 0 + UTF-8 + c + + h + + + + ../RDS_Encoder.X/src + + + + default + 2 + + + + false + + + + diff --git a/queuelogs/debugtool b/queuelogs/debugtool new file mode 100644 index 0000000..5e1e38f --- /dev/null +++ b/queuelogs/debugtool @@ -0,0 +1,169 @@ +276 1706703216816 GEN4_CONNECT_DIAGNOSTICS:MPLABCommTool is null + +276 1706703216816 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Pre:GetFirmwareInfo +276 1706703216816 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Payload +276 1706703216816 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U null +276 1706703216816 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Payload End +276 1706703216817 XXXX 1706703216817, Thread 276: com.Send returned false +276 1706703216817 XXXX 1706703216817, Thread 276: execCommand: exception after writeSideChanel null +276 1706703216817 GEN4_CONNECT_DIAGNOSTICS:Removing plug and play observer com.microchip.mplab.mdbcore.RI4Tool.RI4ToolBase$RI4PlugNPlayObserver@3da58715 +276 1706703216817 GEN4_CONNECT_DIAGNOSTICS:Begin PlugNPlayObservers list dump: +276 1706703216817 GEN4_CONNECT_DIAGNOSTICS:End PlugNPlayObservers list dump: +276 1706703216872 GEN4_CONNECT_DIAGNOSTICS:Calling RIDbgToolCom.Disconnect +276 1706703216872 GEN4_CONNECT_DIAGNOSTICS:Calling MPLABCommTool.Detach to remove tool from plug and play list +276 1706703216872 GEN4_CONNECT_DIAGNOSTICS:Calling RIDbgToolCom.DisconnectFromMPlabComm +276 1706703216872 GEN4_CONNECT_DIAGNOSTICS:Calling MPLABCommTool.Disconnect +304 1706703469409 GEN4_CONNECT_DIAGNOSTICS:MPLABCommTool is NOT null +304 1706703469409 GEN4_CONNECT_DIAGNOSTICS:AttachedToolPID = 9012, AttachedToolVID = 4d8 +304 1706703469409 GEN4_CONNECT_DIAGNOSTICS:transport type = USB +304 1706703469409 GEN4_CONNECT_DIAGNOSTICS:AttachedToolPID = 9012, AttachedToolVID = 4d8 +304 1706703469411 GEN4_CONNECT_DIAGNOSTICS:Before MPLABCommTool.Connect() +304 1706703469411 GEN4_CONNECT_DIAGNOSTICS:After MPLABCommTool.Connect() +304 1706703469411 GEN4_CONNECT_DIAGNOSTICS:Adding new plug and play observer com.microchip.mplab.mdbcore.RI4Tool.RI4ToolBase$RI4PlugNPlayObserver@520b51f5 +304 1706703469411 GEN4_CONNECT_DIAGNOSTICS:Begin PlugNPlayObservers list dump: +304 1706703469411 GEN4_CONNECT_DIAGNOSTICS:com.microchip.mplab.mdbcore.RI4Tool.RI4ToolBase$RI4PlugNPlayObserver@520b51f5 +304 1706703469411 GEN4_CONNECT_DIAGNOSTICS:End PlugNPlayObservers list dump: +304 1706703469411 GEN4_CONNECT_DIAGNOSTICS:Registering for alternate PNP notifications. CommPnPCriteria.cPIDList = [2177, 2179, 217a, 2141, 9017, 901b, 9036, 9035], CommPnPCriteria.cSerialNumber = bur222773012 + +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Pre:init +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: Values: +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: pcAddress = 7fffffffffffffff, Vpp = 3,30, useRowEraseIfVoltageIsLow = false, voltageBelowWhichUseRowErase = 0,00, deviceName = ATxmega128A1U, programmerType = AVR +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: MemInfo values: +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = ffff, exists = true, startAddr = 00000000, endAddr = 00021fff, rowSize = 0200, rowEraseSize = 0200, addrInc = 0001, widthProgram = 0001 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 00ff, exists = true, startAddr = 00820000, endAddr = 00820005, rowSize = 0001, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 00ff, exists = true, startAddr = 00000000, endAddr = 000001ff, rowSize = 0200, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0200, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 00ff, exists = true, startAddr = 00000000, endAddr = 000007ff, rowSize = 0020, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 7fffffff, exists = true, startAddr = 00840000, endAddr = 00840002, rowSize = 0001, rowEraseSize = 0000, addrInc = 0001, widthProgram = 0001 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: mask = 0000, exists = false, startAddr = 00000000, endAddr = 00000000, rowSize = 0000, rowEraseSize = 0000, addrInc = 0000, widthProgram = 0000 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U DeviceInfo: CfgRequiredBitsMask Values: +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Address = 00820000, Mask = 000000ff +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Address = 00820001, Mask = 000000ff +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Address = 00820002, Mask = 00000063 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Address = 00820004, Mask = 0000001f +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Address = 00820005, Mask = 0000003f +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Address = 00830000, Mask = 000000ff +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U BasicInfo: Values: +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U BasicInfo: InputStream = com.microchip.mplab.libs.toolpacksupport.EquatableFileInputStream@4e67ed6a, ToolFlavor = PICKit4 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload End +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Post:init +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return Value +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U none +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return End + +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Pre:GetInterfaceProvider +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U RI4DebugInterface +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload End +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Post:GetInterfaceProvider +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return Value +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U com.microchip.mplab.libs.RI4ToolsController.implementations.RI4DebugInterfaceImpl@709ed82f +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return End + +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Pre:GetInterfaceProvider +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U RI4ProgramInterface +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload End +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Post:GetInterfaceProvider +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return Value +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U com.microchip.mplab.libs.RI4ToolsController.implementations.RI4ProgramInterfaceImpl@5ec90992 +304 1706703469483 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return End + +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Pre:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U RI4ConnectInterface +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload End +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Post:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return Value +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U com.microchip.mplab.libs.PK4ToolsController.PK4ConnectInterfaceImpl@56456f47 +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return End +304 1706703469494 GEN4_CONNECT_DIAGNOSTICS:acceptablePIDs = [9012, 9017, 901b, 9036, 9035] +304 1706703469494 GEN4_CONNECT_DIAGNOSTICS:otherPIDs = [2177, 2179, 217a, 2141] +304 1706703469494 GEN4_CONNECT_DIAGNOSTICS:Setting selected tool type to pk4 +304 1706703469494 GEN4_CONNECT_DIAGNOSTICS:otherPIDs = [2177, 2179, 217a, 2141] +304 1706703469494 GEN4_CONNECT_DIAGNOSTICS:acceptablePIDs = [9012, 9017, 901b, 9036, 9035] + +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Pre:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U RI4ControllerDiagnosticsInterface +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload End +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Post:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return Value +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U com.microchip.mplab.libs.RI4ToolsController.implementations.RI4ControllerDiagnosticsInterfaceImpl@1318c563 +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return End + +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Pre:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U ProgrammerToGo +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload End +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Post:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return Value +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U com.microchip.mplab.libs.RI4ToolsController.implementations.ProgrammerToGoImpl@15c1288f +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return End + +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Pre:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Status +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Payload End +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Post:GetInterfaceProvider +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return Value +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U null +304 1706703469494 GEN4_TO_CONTROLLER_LOG:GEN4_INIT_INT_LOG_ATxmega128A1U Return End +304 1706703469500 GEN4_CONNECT_DIAGNOSTICS:ENTERING: com.microchip.mplab.mdbcore.RI4Tool.ConnectionHandler.CheckForFWUpdates() +304 1706703469500 GEN4_CONNECT_DIAGNOSTICS:Created FirmwareUpdateHandler com.microchip.mplab.mdbcore.pk4hybrid.pk4hybridFirmwareUpdateHandler@3d2363c +304 1706703469503 GEN4_CONNECT_DIAGNOSTICS:ENTERING: com.microchip.mplab.mdbcore.RI4Tool.FirmwareUpdateHandler.UpdateFirmware(FirmwareInfo, UpdateMessage) +304 1706703469503 GEN4_CONNECT_DIAGNOSTICS:areWeInBoot returned false +304 1706703469503 GEN4_CONNECT_DIAGNOSTICS:inBoot = false +304 1706703469503 GEN4_CONNECT_DIAGNOSTICS:uMode = checkingVersions +304 1706703469503 GEN4_CONNECT_DIAGNOSTICS:selectedTool = pk4 +304 1706703469509 GEN4_CONNECT_DIAGNOSTICS:current toolType = pk4 +304 1706703469509 GEN4_CONNECT_DIAGNOSTICS:current tool mode = pk4 +304 1706703469509 GEN4_CONNECT_DIAGNOSTICS:ENTERING: com.microchip.mplab.mdbcore.RI4Tool.FirmwareUpdateHandler.GetUpdateInfo() +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Parsing file for firmware updates +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:ENTERING: com.microchip.mplab.mdbcore.RI4Tool.FirmwareUpdateHandler.ParseSelectedVersionsFromJamFile() +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = boot.hex,010000 +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = scripts.xml,000585 +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app1 020085, 0040C000 +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app2 1.14.268, 00500000 +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app3 000000, FFFFFFFF +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app4 000000, FFFFFFFF +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app5 000000, FFFFFFFF +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app6 000000, FFFFFFFF +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app7 000000, FFFFFFFF +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:Jame file line = app8 000000, FFFFFFFF +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:EXITING: com.microchip.mplab.mdbcore.RI4Tool.FirmwareUpdateHandler.ri4ParseSelectedVersionsFromJamFile() +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:EXITING: com.microchip.mplab.mdbcore.RI4Tool.FirmwareUpdateHandler.GetUpdateInfo() +304 1706703469512 GEN4_CONNECT_DIAGNOSTICS:current toolType = pk4 + +304 1706703469512 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Pre:EstablishCommunincations +304 1706703469512 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Payload +304 1706703469512 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U com.microchip.mplab.mdbcore.PK4Tool.PK4Com@45cd6688 +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Payload End +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Post:EstablishCommunincations +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Return Value +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U true +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Return End + +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Pre:GetFirmwareInfo +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Payload +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U null +304 1706703469513 GEN4_TO_CONTROLLER_LOG:GEN4_CONNECT_INT_LOG_ATxmega128A1U Payload End +304 1706703469518 XXXX 1706703469517, Thread 304: com.Send returned false +304 1706703469518 XXXX 1706703469518, Thread 304: execCommand: exception after writeSideChanel null diff --git a/src/Si5351A/Si5351A-RevB-Registers.h b/src/Si5351A/Si5351A-RevB-Registers.h new file mode 100644 index 0000000..83bd71a --- /dev/null +++ b/src/Si5351A/Si5351A-RevB-Registers.h @@ -0,0 +1,247 @@ +/* + * Si5351A Rev B Configuration Register Export Header File + * + * This file represents a series of Silicon Labs Si5351A Rev B + * register writes that can be performed to load a single configuration + * on a device. It was created by a Silicon Labs ClockBuilder Pro + * export tool. + * + * Part: Si5351A Rev B + * Design ID: + * Includes Pre/Post Download Control Register Writes: No + * Created By: ClockBuilder Pro v2.23 [2018-04-10] + * Timestamp: 2022-08-02 17:59:59 GMT+03:00 + * + * A complete design report corresponding to this export is included at the end + * of this header file. + * + */ + +#ifndef SI5351A_REVB_REG_CONFIG_HEADER +#define SI5351A_REVB_REG_CONFIG_HEADER + +#define SI5351A_REVB_REG_CONFIG_NUM_REGS 49 + +typedef struct +{ + unsigned int address; /* 16-bit register address */ + unsigned char value; /* 8-bit register data */ + +} si5351a_revb_register_t; + +si5351a_revb_register_t const si5351a_revb_registers[SI5351A_REVB_REG_CONFIG_NUM_REGS] = +{ + { 0x0002, 0x53 }, + { 0x0003, 0x00 }, + { 0x0007, 0x00 }, + { 0x000F, 0x00 }, + { 0x0010, 0x0F }, + { 0x0011, 0x8C }, + { 0x0012, 0x0F }, + { 0x0013, 0x8C }, + { 0x0014, 0x8C }, + { 0x0015, 0x8C }, + { 0x0016, 0x8C }, + { 0x0017, 0x8C }, + { 0x001A, 0x00 }, + { 0x001B, 0x01 }, + { 0x001C, 0x00 }, + { 0x001D, 0x10 }, + { 0x001E, 0x00 }, + { 0x001F, 0x00 }, + { 0x0020, 0x00 }, + { 0x0021, 0x00 }, + { 0x002A, 0x00 }, + { 0x002B, 0x01 }, + { 0x002C, 0x00 }, + { 0x002D, 0x10 }, + { 0x002E, 0x00 }, + { 0x002F, 0x00 }, + { 0x0030, 0x00 }, + { 0x0031, 0x00 }, + { 0x003A, 0x00 }, + { 0x003B, 0x85 }, + { 0x003C, 0x00 }, + { 0x003D, 0x1A }, + { 0x003E, 0x32 }, + { 0x003F, 0x00 }, + { 0x0040, 0x00 }, + { 0x0041, 0x06 }, + { 0x005A, 0x00 }, + { 0x005B, 0x00 }, + { 0x0095, 0x00 }, + { 0x0096, 0x00 }, + { 0x0097, 0x00 }, + { 0x0098, 0x00 }, + { 0x0099, 0x00 }, + { 0x009A, 0x00 }, + { 0x009B, 0x00 }, + { 0x00A2, 0x00 }, + { 0x00A3, 0x00 }, + { 0x00A4, 0x00 }, + { 0x00B7, 0x92 }, + +}; + +/* + * Design Report + * + * Overview + * ======== + * Part: Si5351A + * Project File: C:\Users\Admin\Desktop\RDS Encoder\chips\Si5351A-RevB-Project.slabtimeproj + * Created By: ClockBuilder Pro v2.23 [2018-04-10] + * Timestamp: 2022-08-02 17:59:59 GMT+03:00 + * + * Design Notes + * ============ + * Configure Si5351A for RDS Encoder + * IN = 25MHz + * CLK0 = 25MHz -> Ethernet chip + * CLK1 = x + * CLK2 = 15.96MHz -> CPU MCLK + * + * Design Rule Check + * ================= + * Errors: + * - No errors + * + * Warnings: + * - OUT0 [25 MHz] and OUT2 [15.96 MHz] may have coupling [1] + * + * Notes: + * [1] To avoid coupling in outputs, Silicon Labs recommends the following: + * + * - Avoid adjacent frequency values that are close. CBPro uses an output's integration bandwidth (IBW) to determine whether two adjacent frequencies are too close. An IBW of 20 MHz is used for frequencies 80 MHz and larger. Lower frequencies will use IBW of Freq/4. + * - Adjacent frequency values that are integer multiples of one another are okay and these outputs should be grouped accordingly. + * - Unused outputs can be used to separate clock outputs that might otherwise interfere with one another. + * + * Silicon Labs recommends you validate your design's jitter performance using an Evaluation Board. + * + * Design + * ====== + * Inputs: + * IN0: 25 MHz + * + * Outputs: + * OUT0: 25 MHz + * Enabled LVCMOS 8 mA + * Offset 0.000 s + * OUT1: Unused + * OUT2: 15.96 MHz [ 15 + 24/25 MHz ] + * Enabled LVCMOS 8 mA + * Offset 0.000 s + * + * Frequency Plan + * ============== + * PLL_A: + * Enabled Features = None + * Fvco = 900 MHz + * M = 36 + * Input0: + * Source = Crystal + * Source Frequency = 25 MHz + * Fpfd = 25 MHz + * Load Capacitance = Load_08pF + * Output0: + * Features = None + * Disabled State = StopLow + * R = 1 (2^0) + * Fout = 25 MHz + * N = 36 + * Output2: + * Features = None + * Disabled State = StopLow + * R = 1 (2^0) + * Fout = 15.96 MHz [ 15 + 24/25 MHz ] + * N = 56.3909774436090225... [ 56 + 52/133 ] + * + * Settings + * ======== + * + * Location Setting Name Decimal Value Hex Value + * ------------ ------------- ----------------- ----------------- + * 0x0002[3] XO_LOS_MASK 0 0x0 + * 0x0002[4] CLK_LOS_MASK 1 0x1 + * 0x0002[5] LOL_A_MASK 0 0x0 + * 0x0002[6] LOL_B_MASK 1 0x1 + * 0x0002[7] SYS_INIT_MASK 0 0x0 + * 0x0003[7:0] CLK_OEB 0 0x00 + * 0x0007[7:4] I2C_ADDR_CTRL 0 0x0 + * 0x000F[2] PLLA_SRC 0 0x0 + * 0x000F[3] PLLB_SRC 0 0x0 + * 0x000F[4] PLLA_INSELB 0 0x0 + * 0x000F[5] PLLB_INSELB 0 0x0 + * 0x000F[7:6] CLKIN_DIV 0 0x0 + * 0x0010[1:0] CLK0_IDRV 3 0x3 + * 0x0010[3:2] CLK0_SRC 3 0x3 + * 0x0010[4] CLK0_INV 0 0x0 + * 0x0010[5] MS0_SRC 0 0x0 + * 0x0010[6] MS0_INT 0 0x0 + * 0x0010[7] CLK0_PDN 0 0x0 + * 0x0011[1:0] CLK1_IDRV 0 0x0 + * 0x0011[3:2] CLK1_SRC 3 0x3 + * 0x0011[4] CLK1_INV 0 0x0 + * 0x0011[5] MS1_SRC 0 0x0 + * 0x0011[6] MS1_INT 0 0x0 + * 0x0011[7] CLK1_PDN 1 0x1 + * 0x0012[1:0] CLK2_IDRV 3 0x3 + * 0x0012[3:2] CLK2_SRC 3 0x3 + * 0x0012[4] CLK2_INV 0 0x0 + * 0x0012[5] MS2_SRC 0 0x0 + * 0x0012[6] MS2_INT 0 0x0 + * 0x0012[7] CLK2_PDN 0 0x0 + * 0x0013[1:0] CLK3_IDRV 0 0x0 + * 0x0013[3:2] CLK3_SRC 3 0x3 + * 0x0013[4] CLK3_INV 0 0x0 + * 0x0013[5] MS3_SRC 0 0x0 + * 0x0013[6] MS3_INT 0 0x0 + * 0x0013[7] CLK3_PDN 1 0x1 + * 0x0014[1:0] CLK4_IDRV 0 0x0 + * 0x0014[3:2] CLK4_SRC 3 0x3 + * 0x0014[4] CLK4_INV 0 0x0 + * 0x0014[5] MS4_SRC 0 0x0 + * 0x0014[6] MS4_INT 0 0x0 + * 0x0014[7] CLK4_PDN 1 0x1 + * 0x0015[1:0] CLK5_IDRV 0 0x0 + * 0x0015[3:2] CLK5_SRC 3 0x3 + * 0x0015[4] CLK5_INV 0 0x0 + * 0x0015[5] MS5_SRC 0 0x0 + * 0x0015[6] MS5_INT 0 0x0 + * 0x0015[7] CLK5_PDN 1 0x1 + * 0x0016[1:0] CLK6_IDRV 0 0x0 + * 0x0016[3:2] CLK6_SRC 3 0x3 + * 0x0016[4] CLK6_INV 0 0x0 + * 0x0016[5] MS6_SRC 0 0x0 + * 0x0016[6] FBA_INT 0 0x0 + * 0x0016[7] CLK6_PDN 1 0x1 + * 0x0017[1:0] CLK7_IDRV 0 0x0 + * 0x0017[3:2] CLK7_SRC 3 0x3 + * 0x0017[4] CLK7_INV 0 0x0 + * 0x0017[5] MS7_SRC 0 0x0 + * 0x0017[6] FBB_INT 0 0x0 + * 0x0017[7] CLK7_PDN 1 0x1 + * 0x001C[17:0] MSNA_P1 4096 0x01000 + * 0x001F[19:0] MSNA_P2 0 0x00000 + * 0x001F[23:4] MSNA_P3 1 0x00001 + * 0x002C[17:0] MS0_P1 4096 0x01000 + * 0x002F[19:0] MS0_P2 0 0x00000 + * 0x002F[23:4] MS0_P4 1 0x00001 + * 0x003C[17:0] MS2_P1 6706 0x01A32 + * 0x003F[19:0] MS2_P2 6 0x00006 + * 0x003F[23:4] MS2_P4 133 0x00085 + * 0x005A[7:0] MS6_P2 0 0x00 + * 0x005B[7:0] MS7_P2 0 0x00 + * 0x0095[14:0] SSDN_P2 0 0x0000 + * 0x0095[7] SSC_EN 0 0x0 + * 0x0097[14:0] SSDN_P3 0 0x0000 + * 0x0097[7] SSC_MODE 0 0x0 + * 0x0099[11:0] SSDN_P1 0 0x000 + * 0x009A[15:4] SSUDP 0 0x000 + * 0x00A2[21:0] VCXO_PARAM 0 0x000000 + * 0x00B7[7:6] XTAL_CL 2 0x2 + * + * + */ + +#endif \ No newline at end of file diff --git a/src/Si5351A/Si5351A.c b/src/Si5351A/Si5351A.c new file mode 100644 index 0000000..4308164 --- /dev/null +++ b/src/Si5351A/Si5351A.c @@ -0,0 +1,77 @@ +#include +#include "Si5351A.h" +#include "Si5351A-RevB-Registers.h" +#include "../drivers/twi_driver.h" + +#define Si5351A_I2C_ADDR (0x60) // 7-bit address [1100 000R/W] + + +// Configure Si5351A +// IN = 25MHz +// CLK0 = 25MHz -> Ethernet chip +// CLK1 = x +// CLK2 = 15.96MHz -> CPU MCLK + +uint8_t si5351a_init() { + //TODO + //#define F_CPU xx // xx is the clock speed of the Xmega device + + /* + * TWIx is the TWI module of the Xmega device you want to use. + * BAUD_X00K is the speed of the I2C/TWI communication. You can use BAUD_100K and BAUD_400K. + * You can find out which one you need from the datasheet of the device you want to communicate with. + * For single master operations you can leave TIMEOUT_DIS as is. Other options are: TIMEOUT_50US, + * TIMEOUT_100US and TIMEOUT_200US. + */ + // TWI_t TWIx = TWIE; + uint8_t res = TWI_STATUS_OK, i; + + TWI_enable(&TWIE, BAUD_100K, TIMEOUT_DIS); + + // Disable all outputs + res = TWI_write_8bit_register(&TWIE, Si5351A_I2C_ADDR, 0xFF, 3); + if( res != TWI_STATUS_OK ) { + return res; + } + + // Power down all output drivers + for( i = 0; i < 8; i++ ) { + // delay_microseconds(delay); + res = TWI_write_8bit_register(&TWIE, Si5351A_I2C_ADDR, 0x80, 16 + i); + if( res != TWI_STATUS_OK ) { + break; + } + } + if( res != TWI_STATUS_OK ) { + return res; + } + + // Write register values generated by ClockBuilderPro + // Generated register map has 16-bit register address but in the Si5351A-B spec register address is 8-bit long! + for( i = 0; i < SI5351A_REVB_REG_CONFIG_NUM_REGS; i++ ) { + //delay_microseconds(delay); + res = TWI_write_8bit_register(&TWIE, Si5351A_I2C_ADDR, si5351a_revb_registers[i].value, si5351a_revb_registers[i].address & 0xFF); + if( res != TWI_STATUS_OK ) { + break; + } + } + if( res != TWI_STATUS_OK ) { + return res; + } + + // PLL reset + //delay_microseconds(delay); + res = TWI_write_8bit_register(&TWIE, Si5351A_I2C_ADDR, 0xAC, 177); // 0xAC in Si5351A/B/C-B rev1.0, Figure 12. I2C Programming Procedure + if( res != TWI_STATUS_OK ) { + return res; + } + + // Enable OUT0, OUT2 + //delay_microseconds(delay); + res = TWI_write_8bit_register(&TWIE, Si5351A_I2C_ADDR, ~OUT_EN_MASK, 3); + if( res != TWI_STATUS_OK ) { + return res; + } + + return res; +} diff --git a/src/Si5351A/Si5351A.h b/src/Si5351A/Si5351A.h new file mode 100644 index 0000000..b033027 --- /dev/null +++ b/src/Si5351A/Si5351A.h @@ -0,0 +1,15 @@ +#ifndef _SI5351A_H_ +#define _SI5351A_H_ + +#include + +#define OUT_EN_MASK 0b00000101 // Enable outputs [OUT7 - OUT0], 1-enable / 0-disable + +/** + * Initialize PLL Si5351a to generate 15.96 MH + * + * @return status + */ +uint8_t si5351a_init(); + +#endif \ No newline at end of file diff --git a/src/avr_compiler.h b/src/avr_compiler.h new file mode 100644 index 0000000..9f2a034 --- /dev/null +++ b/src/avr_compiler.h @@ -0,0 +1,156 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief This file implements some macros that makes the IAR C-compiler and + * avr-gcc work with the same code base for the AVR architecture. + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 2772 $ + * $Date: 2009-09-11 12:40:26 +0200 (fr, 11 sep 2009) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************/ + +#ifndef COMPILER_AVR_H +#define COMPILER_AVR_H + +#include "config.h" + +#ifndef F_CPU +/*! \brief Define default CPU frequency, if this is not already defined. */ +#define F_CPU 2000000UL +#endif + +#include +#include +#include + +/*! \brief This macro will protect the following code from interrupts. */ +#define AVR_ENTER_CRITICAL_REGION( ) uint8_t volatile saved_sreg = SREG; \ + cli(); + +/*! \brief This macro must always be used in conjunction with AVR_ENTER_CRITICAL_REGION + * so the interrupts are enabled again. + */ +#define AVR_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg; + +#if defined( __ICCAVR__ ) + +#include +#include +#include +#include + +#ifndef __HAS_ELPM__ +#define _MEMATTR __flash +#else /* __HAS_ELPM__ */ +#define _MEMATTR __farflash +#endif /* __HAS_ELPM__ */ + +/*! \brief Perform a delay of \c us microseconds. + * + * The macro F_CPU is supposed to be defined to a constant defining the CPU + * clock frequency (in Hertz). + * + * The maximal possible delay is 262.14 ms / F_CPU in MHz. + * + * \note For the IAR compiler, currently F_CPU must be a + * multiple of 1000000UL (1 MHz). + */ +#define delay_us( us ) ( __delay_cycles( ( F_CPU / 1000000UL ) * ( us ) ) ) + +/*! \brief Preprocessor magic. + * + * Some preprocessor magic to allow for a header file abstraction of + * interrupt service routine declarations for the IAR compiler. This + * requires the use of the C99 _Pragma() directive (rather than the + * old #pragma one that could not be used as a macro replacement), as + * well as two different levels of preprocessor concetanations in + * order to do both, assign the correct interrupt vector name, as well + * as construct a unique function name for the ISR. + * + * \note Do *NOT* try to reorder the macros below, as this will only + * work in the given order. + */ +#define PRAGMA(x) _Pragma( #x ) +#define ISR(vec) PRAGMA( vector=vec ) __interrupt void handler_##vec(void) +#define sei( ) (__enable_interrupt( )) +#define cli( ) (__disable_interrupt( )) + +/*! \brief Define the no operation macro. */ +#define nop( ) (__no_operation()) + +/*! \brief Define the watchdog reset macro. */ +#define watchdog_reset( ) (__watchdog_reset( )) + + +#define INLINE PRAGMA( inline=forced ) static + +#define FLASH_DECLARE(x) _MEMATTR x +#define FLASH_STRING(x) ((_MEMATTR const char *)(x)) +#define FLASH_STRING_T char const _MEMATTR * +#define FLASH_BYTE_ARRAY_T uint8_t const _MEMATTR * +#define PGM_READ_BYTE(x) *(x) +#define PGM_READ_WORD(x) *(x) + +#define SHORTENUM /**/ + +#elif defined( __GNUC__ ) + +#include +#include +#include +#include + +/*! \brief Define the delay_us macro for GCC. */ +#define delay_us( us ) (_delay_us( us )) + +#define INLINE static inline + +/*! \brief Define the no operation macro. */ +#define nop() do { __asm__ __volatile__ ("nop"); } while (0) + +#define MAIN_TASK_PROLOGUE int + + +#define MAIN_TASK_EPILOGUE() return -1; + +#define SHORTENUM __attribute__ ((packed)) + +#else +#error Compiler not supported. +#endif + +#endif + diff --git a/src/config.h b/src/config.h new file mode 100644 index 0000000..97ff447 --- /dev/null +++ b/src/config.h @@ -0,0 +1,94 @@ +#ifndef _CONFIG_H_ +#define _CONFIG_H_ + +#include "rds/rds.h" +#include "uecp/uecp.h" + +// ############################### APP NAME ################################### + +#define APP_NAME "Digiton RDS v1.0" +#define APP_COPYRIGHT "© Digiton " __DATE__ +#define APP_VERSION1 "Version: " __DATE__ " " __TIME__ + +// ############################# END APP NAME ################################# + +// ############################### CLOCK CONFIG ############################### + +/** CPU working frequency. 31.92 MHz. Si5351a geerates 15.96 MHz, then it multiplyed by 2 */ +#define CPU_CLOCK 31920000UL +/** CPU frequency. Used to start only */ +#define F_CPU 32000000UL // CLK SRC = internal 32 MHz ring oscillator + +// ########################### END CLOCK CONFIG ############################### + + +// ############################### WAVE CONFIG ############################### + +/** Place wavetables in the flash memory */ +#undef USE_FLASH +/** Wavetable sample frequency */ +#define WAVE_SAMPLE_FREQUENCY 228000 // 912000// 228000 + +// ########################### END WAVE CONFIG ############################### + +// ############################### UART CONFIG ############################### +/*! + * The board has 2 com-ports: + * 1) connected to DB-9 + * 2) connected via USB-USART bridge + */ +#define USART_PORT_DSUB 1 +#define USART_PORT_USB 2 + +//#define USART_PORT USART_PORT_DSUB +#define USART_PORT USART_PORT_USB + +#define USART_BAUD_RATE 9600 +//#define USART_BAUD_RATE 115200 + +/*! Define that selects the Usart used in example. */ +#if (USART_PORT == USART_PORT_DSUB) + #define USART USARTC0 + #define USART_RXC_vect USARTC0_RXC_vect + #define USART_DRE_vect USARTC0_DRE_vect +#elif (USART_PORT == USART_PORT_USB) + #define USART USARTE0 + #define USART_RXC_vect (USARTE0_RXC_vect) + #define USART_DRE_vect (USARTE0_DRE_vect) +#endif + +// ########################### END UART CONFIG ############################### + + + +// ############################ RDS DEAFULT CONFIG ############################ + +#define DEAFULT_PS "DIGILINE" /**< 8 chars max */ +#define DEAFULT_RT "RDS encoder @ Digiton Systems" /**< 64 chars max */ +#define DEAFULT_PTYN "Orient" /**< 8 chars max */ +#define DEAFULT_PI 0x7101 /**< 8 chars max */ +#define DEAFULT_TA 1 +#define DEAFULT_TP 1 +#define DEAFULT_PTY PTY_EUROPE_POPULAR_MUSIC /*!< 0 to 31 */ +#define DEAFULT_MS MS_MUSIC /**< 1/0, Music / Speech */ +#define DEAFULT_DI DI_STEREO /**< Decoder indentification */ +#define DEFAULT_OUT_LEVEL 4095 /*! The Output level 0...4095 (0...4095) */ +#define DEFAULT_PHASE 0 /*! The phase shift 0...3559 (0...359.9 deg)) */ +#define DEFAULT_MODE BIDIRECTIONAL_MODE_WITH_SPONTANEOUS_RESPONSE /*Sending confirmation UECP*/ +#define DEFAULT_GROUP_SEQUENCE {\ + PI_PTY_TA_MS_DI_AF2_PS2_0A,\ + PI_TP_PTY_AB_RT4_2A,\ + PI_TP_PTY_ODA_3A,\ + PI_TP_PTY_PTYN2_10A,\ + PI_TP_ODA_11A,\ + PI_PTY_TA_MS_DI_AF2_PS2_0A } +#define DEFAULT_GROUP_SEQUENCE_SIZE 6 +#define DEAFULT_AF {.num_entries = 4,.num_afs = 2,.afs = {165,170}}/* Alternative frequencies 104.0 104.5*/ +#define DEAFULT_CT 0 /*Sending time 1 ON 0 OFF*/ + +// ######################## END RDS DEAFULT CONFIG ############################ + + + + +#endif diff --git a/src/drivers/clksys_driver.c b/src/drivers/clksys_driver.c new file mode 100644 index 0000000..29a861b --- /dev/null +++ b/src/drivers/clksys_driver.c @@ -0,0 +1,376 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief XMEGA Clock System driver source file. + * + * This file contains the function implementations for the XMEGA Clock + * System driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA Clock System. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * Several functions use the following construct: + * "some_register = ... | (some_parameter ? SOME_BIT_bm : 0) | ..." + * Although the use of the ternary operator ( if ? then : else ) is + * discouraged, in some occasions the operator makes it possible to + * write pretty clean and neat code. In this driver, the construct is + * used to set or not set a configuration bit based on a boolean input + * parameter, such as the "some_parameter" in the example above. + * + * \par Application note: + * AVR1003: Using the XMEGA Clock System + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 2771 $ + * $Date: 2009-09-11 11:54:26 +0200 (fr, 11 sep 2009) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#include "clksys_driver.h" + +/*! \brief CCP write helper function written in assembly. + * + * This function is written in assembly because of the timecritial + * operation of writing to the registers. + * + * \param address A pointer to the address to write to. + * \param value The value to put in to the register. + */ +void CCPWrite( volatile uint8_t * address, uint8_t value ) +{ +#ifdef __ICCAVR__ + + // Store global interrupt setting in scratch register and disable interrupts. + asm("in R1, 0x3F \n" + "cli" + ); + + // Move destination address pointer to Z pointer registers. + asm("movw r30, r16"); +#ifdef RAMPZ + asm("ldi R16, 0 \n" + "out 0x3B, R16" + ); + +#endif + asm("ldi r16, 0xD8 \n" + "out 0x34, r16 \n" +#if (__MEMORY_MODEL__ == 1) + "st Z, r17 \n"); +#elif (__MEMORY_MODEL__ == 2) + "st Z, r18 \n"); +#else /* (__MEMORY_MODEL__ == 3) || (__MEMORY_MODEL__ == 5) */ + "st Z, r19 \n"); +#endif /* __MEMORY_MODEL__ */ + + // Restore global interrupt setting from scratch register. + asm("out 0x3F, R1"); + +#elif defined __GNUC__ + AVR_ENTER_CRITICAL_REGION( ); + volatile uint8_t * tmpAddr = address; +#ifdef RAMPZ + RAMPZ = 0; +#endif + asm volatile( + "movw r30, %0" "\n\t" + "ldi r16, %2" "\n\t" + "out %3, r16" "\n\t" + "st Z, %1" "\n\t" + : + : "r" (tmpAddr), "r" (value), "M" (CCP_IOREG_gc), "i" (&CCP) + : "r16", "r30", "r31" + ); + + AVR_LEAVE_CRITICAL_REGION( ); +#endif +} + +/*! \brief This function configures the external oscillator. + * + * \note Note that the oscillator cannot be used as a main system clock + * source without being enabled and stable first. Check the ready flag + * before using the clock. The macro CLKSYS_IsReady( _oscSel ) + * can be used to check this. + * + * \param freqRange Frequency range for high-frequency crystal, does + * not apply for external clock or 32kHz crystals. + * \param lowPower32kHz True of high-quality watch crystals are used and + * low-power oscillator is desired. + * \param xoscModeSelection Combined selection of oscillator type (or + * external clock) and startup times. + */ +void CLKSYS_XOSC_Config( OSC_FRQRANGE_t freqRange, + bool lowPower32kHz, + OSC_XOSCSEL_t xoscModeSelection ) +{ + OSC.XOSCCTRL = (uint8_t) freqRange | + ( lowPower32kHz ? OSC_X32KLPM_bm : 0 ) | + xoscModeSelection; +} + + +/*! \brief This function configures the internal high-frequency PLL. + * + * Configuration of the internal high-frequency PLL to the correct + * values. It is used to define the input of the PLL and the factor of + * multiplication of the input clock source. + * + * \note Note that the oscillator cannot be used as a main system clock + * source without being enabled and stable first. Check the ready flag + * before using the clock. The macro CLKSYS_IsReady( _oscSel ) + * can be used to check this. + * + * \param clockSource Reference clock source for the PLL, + * must be above 0.4MHz. + * \param factor PLL multiplication factor, must be + * from 1 to 31, inclusive. + */ +void CLKSYS_PLL_Config( OSC_PLLSRC_t clockSource, uint8_t factor ) +{ + factor &= OSC_PLLFAC_gm; + OSC.PLLCTRL = (uint8_t) clockSource | ( factor << OSC_PLLFAC_gp ); +} + + +/*! \brief This function disables the selected oscillator. + * + * This function will disable the selected oscillator if possible. + * If it is currently used as a main system clock source, hardware will + * disregard the disable attempt, and this function will return zero. + * If it fails, change to another main system clock source and try again. + * + * \param oscSel Bitmask of selected clock. Can be one of the following + * OSC_RC2MEN_bm, OSC_RC32MEN_bm, OSC_RC32KEN_bm, + * OSC_XOSCEN_bm, OSC_PLLEN_bm. + * + * \return Non-zero if oscillator was disabled successfully. + */ +uint8_t CLKSYS_Disable( uint8_t oscSel ) +{ + OSC.CTRL &= ~oscSel; + uint8_t clkEnabled = OSC.CTRL & oscSel; + return clkEnabled; +} + + +/*! \brief This function changes the prescaler configuration. + * + * Change the configuration of the three system clock + * prescaler is one single operation. The user must make sure that + * the main CPU clock does not exceed recommended limits. + * + * \param PSAfactor Prescaler A division factor, OFF or 2 to 512 in + * powers of two. + * \param PSBCfactor Prescaler B and C division factor, in the combination + * of (1,1), (1,2), (4,1) or (2,2). + */ +void CLKSYS_Prescalers_Config( CLK_PSADIV_t PSAfactor, + CLK_PSBCDIV_t PSBCfactor ) +{ + uint8_t PSconfig = (uint8_t) PSAfactor | PSBCfactor; + CCPWrite( &CLK.PSCTRL, PSconfig ); +} + + +/*! \brief This function selects the main system clock source. + * + * Hardware will disregard any attempts to select a clock source that is not + * enabled or not stable. If the change fails, make sure the source is ready + * and running and try again. + * + * \param clockSource Clock source to use as input for the system clock + * prescaler block. + * + * \return Non-zero if change was successful. + */ +uint8_t CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_t clockSource ) +{ + uint8_t clkCtrl = ( CLK.CTRL & ~CLK_SCLKSEL_gm ) | clockSource; + CCPWrite( &CLK.CTRL, clkCtrl ); + clkCtrl = ( CLK.CTRL & clockSource ); + return clkCtrl; +} + + +/*! \brief This function selects a Real-Time Counter clock source. + * + * Selects the clock source for use by the Real-Time Counter (RTC) + * and enables clock signal routing to the RTC module. + * + * \param clockSource Clock source to use for the RTC. + */ +void CLKSYS_RTC_ClockSource_Enable( CLK_RTCSRC_t clockSource ) +{ + CLK.RTCCTRL = ( CLK.RTCCTRL & ~CLK_RTCSRC_gm ) | + clockSource | + CLK_RTCEN_bm; +} + + +/*! \brief This function enables automatic calibration of the selected internal + * oscillator. + * + * Either the internal 32kHz RC oscillator or an external 32kHz + * crystal can be used as a calibration reference. The user must make sure + * that the selected reference is ready and running. + * + * \param clkSource Clock source to calibrate, either OSC_RC2MCREF_bm or + * OSC_RC32MCREF_bm. + * \param extReference True if external crystal should be used as reference. + */ +void CLKSYS_AutoCalibration_Enable( uint8_t clkSource, bool extReference ) +{ + OSC.DFLLCTRL = ( OSC.DFLLCTRL & ~clkSource ) | + ( extReference ? clkSource : 0 ); + if (clkSource == OSC_RC2MCREF_bm) { + DFLLRC2M.CTRL |= DFLL_ENABLE_bm; + } else if (clkSource == OSC_RC32MCREF_gm) { + DFLLRC32M.CTRL |= DFLL_ENABLE_bm; + } +} + + +/*! \brief This function enables the External Oscillator Failure Detection + * (XOSCFD) feature. + * + * The feature will stay enabled until next reset. Note that the + * XOSCFD _will_ issue the XOSCF Non-maskable Interrupt (NMI) regardless of + * any interrupt priorities and settings. Therefore, make sure that a handler + * is implemented for the XOSCF NMI when you enable it. + */ +void CLKSYS_XOSC_FailureDetection_Enable( void ) +{ + CCPWrite( &OSC.XOSCFAIL, ( OSC_XOSCFDIF_bm | OSC_XOSCFDEN_bm ) ); +} + + +/*! \brief This function lock the entire clock system configuration. + * + * This will lock the configuration until the next reset, or until the + * External Oscillator Failure Detections (XOSCFD) feature detects a failure + * and switches to internal 2MHz RC oscillator. + */ +void CLKSYS_Configuration_Lock( void ) +{ + CCPWrite( &CLK.LOCK, CLK_LOCK_bm ); +} +void clock_init() { + //------------------- + /* + * Enable internal 32 MHz ring oscillator and wait until it's stable. + * Set the 32 MHz ring oscillator as the main clock source. + */ + CLKSYS_Enable( OSC_RC32MEN_bm ); + CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_1_1_gc ); + do {} while ( CLKSYS_IsReady( OSC_RC32MRDY_bm ) == 0 ); + CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_RC32M_gc ); + + /* + * Configure external clock generator Si5351A via I2C + */ + si5351a_init(); + + /* Enable the external 12-16 MHz crystal. + * Check if it's stable and set the external + * clock as the main clock source. Disable the internal 32 MHz ring oscillator. + */ + CLKSYS_XOSC_Config( OSC_FRQRANGE_12TO16_gc, + false, + OSC_XOSCSEL_EXTCLK_gc ); + CLKSYS_Enable( OSC_XOSCEN_bm ); + do {} while ( CLKSYS_IsReady( OSC_XOSCRDY_bm ) == 0 ); + CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_XOSC_gc ); + CLKSYS_Disable( OSC_RC32MEN_bm ); + + /* Configure PLL with the External clock 15.96 MHz as source and + * multiply by 2 to get 31.92 MHz PLL clock and enable it. Wait + * for it to be stable. + */ + CLKSYS_PLL_Config( OSC_PLLSRC_XOSC_gc, 2 ); + CLKSYS_Enable( OSC_PLLEN_bm ); + CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_1_1_gc ); + do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 ); + CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc ); + + /* + * When using external crystals or external clock sources, there is always a slight + * probability of the source failing. As a safety precaution, the XMEGA Clock System + * has an External Oscillator Failure Detector that monitors the external clock source + * and reacts if it stops. + * If the external source is selected as the main system clock source and it fails, the + * failure detector switches to the internal 2 MHz RC oscillator and issues a Nonmaskable + * Interrupt (NMI). Please refer to the application note "AVR1305: XMEGA + * Interrupts and the Programmable Multilevel Interrupt Controller" for more details on NMIs. + */ + CLKSYS_XOSC_FailureDetection_Enable(); + //=================== + + /* + OSC.CTRL |= OSC_RC32KEN_bm; // enable the 32.768kHz internal oscillator + while (!(OSC.STATUS & OSC_RC32KRDY_bm)); + OSC.CTRL |= OSC_RC32MEN_bm; // enable the 32MHz internal oscillator + + CCP = CCP_IOREG_gc; + CLK.PSCTRL = ((CLK_PSCTRL & (~(CLK_PSADIV_gm | CLK_PSBCDIV_gm))) | CLK_PSADIV_1_gc | CLK_PSBCDIV_2_2_gc); //Prescaler A = no division, Prescaler B = C = Divide by 2 + OSC.DFLLCTRL = ((OSC.DFLLCTRL & (~(OSC_RC32MCREF_gm | OSC_RC2MCREF_bm))) | OSC_RC32MCREF_RC32K_gc); + + DFLLRC32M.CTRL |= DFLL_ENABLE_bm; + while (!(OSC.STATUS & OSC_RC32MRDY_bm)); + + CCP = CCP_IOREG_gc; + //CLK.CTRL = ((CLK.CTRL & (~CLK_SCLKSEL_gm)) | CLK_SCLKSEL_RC32K_gc); // System clock source = 32.768kHz internal oscillator + CLK.CTRL = ((CLK.CTRL & (~CLK_SCLKSEL_gm)) | CLK_SCLKSEL_XOSC_gc); // System clock source = external clock 15.96MHz + OSC.CTRL &= (~(OSC_RC2MEN_bm | OSC_XOSCEN_bm | OSC_PLLEN_bm)); + PORTCFG.CLKEVOUT = 0x00; + + // RF-- + OSC.PLLCTRL = OSC_PLLSRC_XOSC_gc | 2; // PLL source = Ext.clock, multiplicator = 2x; + // --RF + */ + +} + +/*! Just ... when external oscillator failure interrupt occurs. */ +//ISR(OSCF_vect) +//{ +// +//} diff --git a/src/drivers/clksys_driver.h b/src/drivers/clksys_driver.h new file mode 100644 index 0000000..805206d --- /dev/null +++ b/src/drivers/clksys_driver.h @@ -0,0 +1,123 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief XMEGA Clock System driver header file. + * + * This file contains the function prototypes and enumerator definitions + * for various configuration parameters for the XMEGA Clock System driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA Clock System. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * \par Application note: + * AVR1003: Using the XMEGA Clock System + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 1665 $ + * $Date: 2008-06-05 09:21:50 +0200 (to, 05 jun 2008) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#ifndef CLKSYS_DRIVER_H +#define CLKSYS_DRIVER_H + +#include "../avr_compiler.h" +#include "../Si5351A/Si5351A.h" +/* Definitions of macros. */ + +/*! \brief This macro enables the selected oscillator. + * + * \note Note that the oscillator cannot be used as a main system clock + * source without being enabled and stable first. Check the ready flag + * before using the clock. The function CLKSYS_IsReady( _oscSel ) + * can be used to check this. + * + * \param _oscSel Bitmask of selected clock. Can be one of the following + * OSC_RC2MEN_bm, OSC_RC32MEN_bm, OSC_RC32KEN_bm, OSC_XOSCEN_bm, + * OSC_PLLEN_bm. + */ +#define CLKSYS_Enable( _oscSel ) ( OSC.CTRL |= (_oscSel) ) + +/*! \brief This macro check if selected oscillator is ready. + * + * This macro will return non-zero if is is running, regardless if it is + * used as a main clock source or not. + * + * \param _oscSel Bitmask of selected clock. Can be one of the following + * OSC_RC2MEN_bm, OSC_RC32MEN_bm, OSC_RC32KEN_bm, OSC_XOSCEN_bm, + * OSC_PLLEN_bm. + * + * \return Non-zero if oscillator is ready and running. + */ +#define CLKSYS_IsReady( _oscSel ) ( OSC.STATUS & (_oscSel) ) + +/*! \brief This macro disables routing of clock signals to the Real-Time + * Counter (RTC). + * + * Disabling the RTC saves power if the RTC is not in use. + */ +#define CLKSYS_RTC_ClockSource_Disable() ( CLK.RTCCTRL &= ~CLK_RTCEN_bm ) + +/*! \brief This macro disables the automatic calibration of the selected + * internal oscillator. + * + * \param _clk Clock source calibration to disable, either DFLLRC2M or DFLLRC32M. + */ +#define CLKSYS_AutoCalibration_Disable( _clk ) ( (_clk).CTRL &= ~DFLL_ENABLE_bm ) + + +/* Prototyping of function. Detailed information is found in source file. */ +void CCPWrite( volatile uint8_t * address, uint8_t value ); +void CLKSYS_XOSC_Config( OSC_FRQRANGE_t freqRange, + bool lowPower32kHz, + OSC_XOSCSEL_t xoscModeSelection ); +void CLKSYS_PLL_Config( OSC_PLLSRC_t clockSource, uint8_t factor ); +uint8_t CLKSYS_Disable( uint8_t oscSel ); +void CLKSYS_Prescalers_Config( CLK_PSADIV_t PSAfactor, + CLK_PSBCDIV_t PSBCfactor ); +uint8_t CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_t clockSource ); +void CLKSYS_RTC_ClockSource_Enable( CLK_RTCSRC_t clockSource ); +void CLKSYS_AutoCalibration_Enable( uint8_t clkSource, bool extReference ); +void CLKSYS_XOSC_FailureDetection_Enable( void ); +void CLKSYS_Configuration_Lock( void ); +void clock_init(); + +#endif diff --git a/src/drivers/dac_driver.c b/src/drivers/dac_driver.c new file mode 100644 index 0000000..f8ce3f1 --- /dev/null +++ b/src/drivers/dac_driver.c @@ -0,0 +1,180 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief XMEGA DAC driver source file. + * + * This file contains the function implementations for the XMEGA DAC driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA DAC module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * Several functions use the following construct: + * "some_register = ... | (some_parameter ? SOME_BIT_bm : 0) | ..." + * Although the use of the ternary operator ( if ? then : else ) is + * discouraged, in some occasions the operator makes it possible to + * write pretty clean and neat code. In this driver, the construct is + * used to set or not set a configuration bit based on a boolean input + * parameter, such as the "some_parameter" in the example above. + * + * \par Application note: + * AVR1301: Using the XMEGA DAC + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 1646 $ + * $Date: 2008-05-14 16:04:55 +0200 (on, 14 mai 2008) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#include "dac_driver.h" + + +/*! \brief Enable Singe Channel. + * + * This function configures the DAC to enable channel 0 output only, + * in single channel operation. It apply configuration parameters, save old + * values, clear affected bit field and set appropriate values. + * + * \param dac Pointer to DAC module register section. + * \param convRef Selects reference voltage for all conversions. + * \param leftAdjust Set to true to make data registers left adjusted. + */ +void DAC_SingleChannel_Enable( volatile DAC_t * dac, + DAC_REFSEL_t convRef, + bool leftAdjust ) +{ + dac->CTRLB = ( dac->CTRLB & ~DAC_CHSEL_gm ) | DAC_CHSEL_SINGLE_gc; + dac->CTRLC = ( dac->CTRLC & ~(DAC_REFSEL_gm | DAC_LEFTADJ_bm) ) | + convRef | ( leftAdjust ? DAC_LEFTADJ_bm : 0x00 ); + dac->CTRLA = ( dac->CTRLA & ~DAC_CH1EN_bm ) | + DAC_CH0EN_bm | DAC_ENABLE_bm; +} + + +/*! \brief Enable Dual Channel. + * + * This function configures the DAC to enable both channel outputs, + * in dual channel operation. It apply configuration parameters, save old + * values, clear affected bit field and set appropriate values. + * + * \param dac Pointer to DAC module register section. + * \param convRef Selects reference voltage for all conversions. + * \param leftAdjust Set to true to make data registers left adjusted. + * \param sampleInterval Interval between refreshing channel A and B. + * \param refreshInterval Interval between refresh cycles. + */ +void DAC_DualChannel_Enable( volatile DAC_t * dac, + DAC_REFSEL_t convRef, + bool leftAdjust, + /*DAC_CONINTVAL_t*/uint8_t sampleInterval, + /*DAC_REFRESH_t*/uint8_t refreshInterval ) +{ + dac->CTRLB = ( dac->CTRLB & ~DAC_CHSEL_gm ) | DAC_CHSEL_DUAL_gc; + dac->CTRLC = ( dac->CTRLC & ~( DAC_REFSEL_gm | DAC_LEFTADJ_bm ) ) | + convRef | + ( leftAdjust ? DAC_LEFTADJ_bm : 0x00 ); + //dac->TIMCTRL = (uint8_t) sampleInterval | refreshInterval; + dac->CTRLA |= DAC_CH1EN_bm | DAC_CH0EN_bm | DAC_ENABLE_bm; +} + + +/*! \brief Write data to selected channel. + * + * This function writes data to the selected channel data register. The program + * should wait for the data register to be ready if necessary. This ensures + * that no intermediate values are lost with very high update rates. + * + * \note The data must be in the format currently configured for the DAC, + * right or left adjusted. + * + * \param dac Pointer to DAC module register section. + * \param data Data to be converted. + * \param channel Selected channel in the DAC module, either CH0 or CH1. + */ +void DAC_Channel_Write( volatile DAC_t * dac, uint16_t data, DAC_CH_t channel ) +{ + if ( channel == CH0 ) { + dac->CH0DATA = data; + } else { + dac->CH1DATA = data; + } +} + + +/*! \brief Check if channel data register is empty. + * + * This function return the status of the data register empty flag for + * the selected channel in the given DAC module. This can be used to get the + * status of the register before writing a new value to it. + * + * \param dac Pointer to DAC module register section. + * \param channel Selected channel in the DAC module, either CH0 or CH1. + * + * \retval dacStatus True if data register is empty. + * \retval dacStatus False if data register is not empty. + */ +bool DAC_Channel_DataEmpty( volatile DAC_t * dac, DAC_CH_t channel ) +{ + bool dacStatus = ( dac->STATUS & + ( channel ? DAC_CH1DRE_bm : DAC_CH0DRE_bm )); + return dacStatus; +} + + +/*! \brief Configure event actions. + * + * This function configures the event action for the DAC module. It clears + * both control bits and set required bits. + * + * \note There is no checking if the event line number is valid. The value + * is simply truncated to fit the bit field in the corresponding register. + * + * \param dac Pointer to DAC module register section. + * \param trigChannel The channels to be triggered by events. Values can be + * DAC_TRIG_0_0, DAC_TRIG_0_1, DAC_TRIG_1_0 or DAC_TRIG_0_0. + * \param eventLine Event line (0..7) to use for triggering conversions. + */ +void DAC_EventAction_Set( volatile DAC_t * dac, + DAC_TRIG_t trigChannel, + uint8_t eventLine ) +{ + dac->CTRLB = ( dac->CTRLB & ~DAC_TRIG_1_1 ) | trigChannel; + dac->EVCTRL = eventLine & DAC_EVSEL_gm; +} diff --git a/src/drivers/dac_driver.h b/src/drivers/dac_driver.h new file mode 100644 index 0000000..209ff8e --- /dev/null +++ b/src/drivers/dac_driver.h @@ -0,0 +1,125 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief XMEGA DAC driver header file. + * + * This file contains the function prototypes and enumerator definitions + * for various configuration parameters for the XMEGA DAC driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA DAC module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * \par Application note: + * AVR1301: Using the XMEGA DAC + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 1569 $ + * $Date: 2008-04-22 13:03:43 +0200 (ti, 22 apr 2008) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#ifndef DAC_DRIVER_H +#define DAC_DRIVER_H + +#include "../avr_compiler.h" + +/*! \brief Enumerator for DAC channels. */ +typedef enum DAC_CH_enum { + CH0 = 0x00, + CH1 = 0x01, +} DAC_CH_t; + + +/*! \brief Enumerator for DAC event trigger. */ +typedef enum DAC_TRIG_enum { + DAC_TRIG_0_0 = 0x00, /*!< Trigger on no channel. */ + DAC_TRIG_0_1 = DAC_CH0TRIG_bm, /*!< Trigger on channel 0. */ + DAC_TRIG_1_0 = DAC_CH1TRIG_bm, /*!< Trigger on channel 1. */ + DAC_TRIG_1_1 = ( DAC_CH1TRIG_bm | DAC_CH0TRIG_bm ), /*!< Trigger on both channels. */ +} DAC_TRIG_t; + + +/* Definition of macros. */ + +/*! \brief This macro disables the selected DAC module. + * + * \param _dac The DAC module, either DACA or DACB. + */ +#define DAC_Disable( _dac ) ( (_dac)->CTRLA &= ~DAC_ENABLE_bm ) + + +/*! \brief Enable output to internal ADC. + * + * This macro enables routing of the internal DAC output to + * the ADC module. This feature is useful for diagnostics and + * calibration purposes. + * + * \param _dac The DAC module, either DACA or DACB. + */ +#define DAC_InternalOutput_Enable( _dac ) ( (_dac)->CTRLA |= DAC_IDOEN_bm ) + + +/*! \brief This macro disables internal routing of the DAC output to an + * internal ADC module. + * + * \param _dac The DAC module, either DACA or DACB. + */ +#define DAC_InternalOutput_Disable( _dac ) ( (_dac)->CTRLA &= ~DAC_IDOEN_bm ) + + +/* Prototyping of functions. Documentation is found in source file. */ + +void DAC_SingleChannel_Enable( volatile DAC_t * dac, + DAC_REFSEL_t convRef, + bool leftAdjust ); +void DAC_DualChannel_Enable( volatile DAC_t * dac, + DAC_REFSEL_t convRef, + bool leftAdjust, + /*DAC_CONINTVAL_t*/uint8_t sampleInterval, + /*DAC_REFRESH_t*/uint8_t refreshInterval ); +void DAC_Channel_Write( volatile DAC_t * dac, uint16_t data, DAC_CH_t channel ); +bool DAC_Channel_DataEmpty( volatile DAC_t * dac, DAC_CH_t channel ); +void DAC_EventAction_Set( volatile DAC_t * dac, + DAC_TRIG_t trigChannel, + uint8_t eventLine ); + +#endif + diff --git a/src/drivers/dma_driver.c b/src/drivers/dma_driver.c new file mode 100644 index 0000000..c265bbb --- /dev/null +++ b/src/drivers/dma_driver.c @@ -0,0 +1,479 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief XMEGA DMA Controller driver source file. + * + * This file contains the function implementations for the XMEGA DMA driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA DMA module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * \par Application note: + * AVR1304: Using the XMEGA DMA Controller + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 2593 $ + * $Date: 2009-07-17 15:22:29 +0200 (fr, 17 jul 2009) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +#include "dma_driver.h" + + +/*! \brief This function forces a software reset of the DMA module. + * + * All registers will be set to their default values. If the DMA + * module is enabled, it must and will be disabled before being reset. + * It will not be enabled afterwards. + */ +void DMA_Reset( void ) +{ + DMA.CTRL &= ~DMA_ENABLE_bm; + DMA.CTRL |= DMA_RESET_bm; + while (DMA.CTRL & DMA_RESET_bm); // Wait until reset is completed +} + + +/*! \brief This function configures the double buffering feature of the DMA. + * + * Channel pair 0/1 and/or channel pair 2/3 can + * be configured to operation in a chained mode. This means that + * once the first channel has completed its transfer, the second + * channel takes over automatically. It is important to setup the + * channel pair with equal block sizes, repeat modes etc. + * + * Do not change these settings after a transfer has started. + * + * \param dbufMode Double buffering mode. + */ +void DMA_ConfigDoubleBuffering( DMA_DBUFMODE_t dbufMode ) +{ + DMA.CTRL = ( DMA.CTRL & ~DMA_DBUFMODE_gm ) | dbufMode; +} + + +/*! \brief This function selects what priority scheme to use for the DMA channels. + * + * It decides what channels to schedule in a round-robin + * manner, which means that they take turns in acquiring the data bus + * for individual data transfers. Channels not included in the round-robin + * scheme will have fixed priorities, with channel 0 having highest priority. + * + * \note Do not change these settings after a transfer has started. + * + * \param priMode An enum selection the priority scheme to use. + */ +void DMA_SetPriority( DMA_PRIMODE_t priMode ) +{ + DMA.CTRL = ( DMA.CTRL & ~DMA_PRIMODE_gm ) | priMode; +} + + +/*! \brief This function checks if the channel has on-going transfers not + * finished yet. + * + * \param channel Channel to check. + * + * \return Non-zero if the selected channel have on-going transfers, + * zero otherwise. + */ +uint8_t DMA_CH_IsOngoing( volatile DMA_CH_t * channel ) +{ + uint8_t flagMask; + flagMask = channel->CTRLB & DMA_CH_CHBUSY_bm; + return flagMask; +} + +/*! \brief This function checks if any channel have on-going transfers are not + * finished yet. + * + * \return Non-zero if any channel have on-going transfers, zero otherwise. + */ +uint8_t DMA_IsOngoing( void ) +{ + uint8_t flagMask; + flagMask = DMA.STATUS & 0xF0; + return flagMask; +} + +/*! \brief This function check if the channel has transfers pending. + * + * This function checks if the channel selected have transfers that are + * pending, which means that a transfer has been requested by a trigger source + * or by a manual request, but the channel haven't yet started its transfer. + * + * \param channel Channel to check. + * + * \return Non-zero if the selected channel have pending transfers, + * zero otherwise. + */ +uint8_t DMA_CH_IsPending( volatile DMA_CH_t * channel ) +{ + uint8_t flagMask; + flagMask = channel->CTRLB & DMA_CH_CHPEND_bm; + return flagMask; +} + + +/*! \brief This function check if there are any transfers pending. + * + * This function checks if any channel have transfers that are pending, + * which means that a transfer has been requested by a trigger source + * or by a manual request, but the channels haven't yet started its transfer. + * + * \return Non-zero if the selected channel have pending transfers, + * zero otherwise. + */ +uint8_t DMA_IsPending( void ) +{ + uint8_t flagMask; + flagMask = DMA.STATUS & 0x0F; + return flagMask; +} + +/*! \brief This function return the interrupt flag status of a channel. + * + * This function return the status the channels selected finishes an on-going + * transfer or encounters an error and aborts the transfer. + * + * \note Flags covered by the channel will NOT be cleared when this + * function exits. + * + * \param channel The channel to check. + * + * \return Relevant interrupt flags. + */ +uint8_t DMA_ReturnStatus_non_blocking( volatile DMA_CH_t * channel ) +{ + uint8_t relevantFlags; + relevantFlags = channel->CTRLB & (DMA_CH_ERRIF_bm | DMA_CH_TRNIF_bm); + return relevantFlags; +} + + +/*! \brief This function return the interrupt flag status of a channel. + * + * This function return the status of the channel selected either finishes + * an on-going transfer or encounters an error and aborts the transfer. + * + * \note Flags covered by the channel will be cleared when this + * function exits. However, it will return the flag status. This + * is a BLOCKING function, and will go into a dead-lock if the flags + * never get set. + * + * \param channel The channel to check. + * + * \return Relevant interrupt flags. + */ +uint8_t DMA_ReturnStatus_blocking( volatile DMA_CH_t * channel ) +{ + uint8_t flagMask; + uint8_t relevantFlags; + + flagMask = DMA_CH_ERRIF_bm | DMA_CH_TRNIF_bm; + + do { + relevantFlags = channel->CTRLB & flagMask; + } while (relevantFlags == 0x00); + + channel->CTRLB = flagMask; + return relevantFlags; +} + +/*! \brief This function enables one DMA channel sub module. + * + * \note A DMA channel will be automatically disabled + * when a transfer is finished. + * + * \param channel The channel to enable. + */ +void DMA_EnableChannel( volatile DMA_CH_t * channel ) +{ + channel->CTRLA |= DMA_CH_ENABLE_bm; +} + + +/*! \brief This function disables one DMA channel sub module. + * + * \note On-going transfers will be aborted and the error flag be set if a + * channel is disabled in the middle of a transfer. + * + * \param channel The channel to disable. + */ +void DMA_DisableChannel( volatile DMA_CH_t * channel ) +{ + channel->CTRLA &= ~DMA_CH_ENABLE_bm; +} + + +/*! \brief This function forces a software reset of the DMA channel sub module. + * + * All registers will be set to their default values. If the channel + * is enabled, it must and will be disabled before being reset. + * It will not be enabled afterwards. + * + * \param channel The channel to reset. + */ +void DMA_ResetChannel( volatile DMA_CH_t * channel ) +{ + channel->CTRLA &= ~DMA_CH_ENABLE_bm; + channel->CTRLA |= DMA_CH_RESET_bm; + channel->CTRLA &= ~DMA_CH_RESET_bm; +} + + +/*! \brief This function configures the interrupt levels for one DMA channel. + * + * \note The interrupt level parameter use the data type for channel 0, + * regardless of which channel is used. This is because we use the + * same function for all channel. This method relies upon channel + * bit fields to be located this way: CH3:CH2:CH1:CH0. + * + * \param channel The channel to configure. + * \param transferInt Transfer Complete Interrupt Level. + * \param errorInt Transfer Error Interrupt Level. + */ +void DMA_SetIntLevel( volatile DMA_CH_t * channel, + DMA_CH_TRNINTLVL_t transferInt, + DMA_CH_ERRINTLVL_t errorInt ) +{ + channel->CTRLB = (channel->CTRLB & ~(DMA_CH_ERRINTLVL_gm | DMA_CH_TRNINTLVL_gm)) | + transferInt | errorInt; +} + + +/*! \brief This function configures the necessary registers for a block transfer. + * + * \note The transfer must be manually triggered or a trigger source + * selected before the transfer starts. It is possible to reload the + * source and/or destination address after each data transfer, block + * transfer or only when the entire transfer is complete. + * Do not change these settings after a transfer has started. + * + * \param channel The channel to configure. + * \param srcAddr Source memory address. + * \param srcReload Source address reload mode. + * \param srcDirection Source address direction (fixed, increment, or decrement). + * \param destAddr Destination memory address. + * \param destReload Destination address reload mode. + * \param destDirection Destination address direction (fixed, increment, or decrement). + * \param blockSize Block size in number of bytes (0 = 64k). + * \param burstMode Number of bytes per data transfer (1, 2, 4, or 8 bytes). + * \param repeatCount Number of blocks, 0x00 if you want to repeat at infinitum. + * \param useRepeat True if reapeat should be used, false if not. + */ +void DMA_SetupBlock( volatile DMA_CH_t * channel, + const void * srcAddr, + DMA_CH_SRCRELOAD_t srcReload, + DMA_CH_SRCDIR_t srcDirection, + void * destAddr, + DMA_CH_DESTRELOAD_t destReload, + DMA_CH_DESTDIR_t destDirection, + uint16_t blockSize, + DMA_CH_BURSTLEN_t burstMode, + uint8_t repeatCount, + bool useRepeat ) +{ + channel->SRCADDR0 = (register8_t) (( (uint32_t) srcAddr) >> 0*8 ); + channel->SRCADDR1 = (register8_t) (( (uint32_t) srcAddr) >> 1*8 ); + channel->SRCADDR2 = (register8_t) (( (uint32_t) srcAddr) >> 2*8 ); + + channel->DESTADDR0 = (register8_t) (( (uint32_t) destAddr) >> 0*8 ); + channel->DESTADDR1 = (register8_t) (( (uint32_t) destAddr) >> 1*8 ); + channel->DESTADDR2 = (register8_t) (( (uint32_t) destAddr) >> 2*8 ); + + channel->ADDRCTRL = (uint8_t) srcReload | srcDirection | + destReload | destDirection; + channel->TRFCNT = blockSize; + channel->CTRLA = ( channel->CTRLA & ~( DMA_CH_BURSTLEN_gm | DMA_CH_REPEAT_bm ) ) | + burstMode | ( useRepeat ? DMA_CH_REPEAT_bm : 0); + + if ( useRepeat ) { + channel->REPCNT = repeatCount; + } +} + + +/*! \brief This function enables single-shot transfer mode for a channel. + * + * In single-shot mode, one transfer trigger (manual or from a trigger source) + * only causes one single data transfer (1, 2, 4, or 8 byte). When not + * in single-shot mode, one transfer trigger causes one entire block transfer. + * Do not change this setting after a transfer has started. + * + * \param channel The channel to configure. + */ +void DMA_EnableSingleShot( volatile DMA_CH_t * channel ) +{ + channel->CTRLA |= DMA_CH_SINGLE_bm; +} + + +/*! \brief This function disables single-shot transfer mode for a channel. + * + * In single-shot mode, one transfer trigger (manual or from a trigger source) + * only causes one single data transfer (1, 2, 4, or 8 byte). When not + * in single-shot mode, one transfer trigger causes one entire block transfer. + * + * Do not change this setting after a transfer has started. + * + * \param channel The channel to configure. + */ +void DMA_DisableSingleShot( volatile DMA_CH_t * channel ) +{ + channel->CTRLA &= ~DMA_CH_SINGLE_bm; +} + + +/*! \brief This function sets the transfer trigger source for a channel. + * + * \note A manual transfer requests can be used even after setting a trigger + * source. Do not change this setting after a transfer has started. + * + * \param channel The channel to configure. + * \param trigger The trigger source ID. + */ +void DMA_SetTriggerSource( volatile DMA_CH_t * channel, uint8_t trigger ) +{ + channel->TRIGSRC = trigger; +} + + +/*! \brief This function sends a manual transfer request to the channel. + * + * The bit will automatically clear when transfer starts. + * + * \param channel The channel to request a transfer for. + */ +void DMA_StartTransfer( volatile DMA_CH_t * channel ) +{ + channel->CTRLA |= DMA_CH_TRFREQ_bm; +} + +/*! \brief Example of a repeated block memory copy operation. + * + * Block size 0 = 64k. Enable the DMA channel to use first and the channel + * will be disabled automatically. A parameter check to avoid illegal values. + * Setup channel for copying data, increasing addresses, no address pointer + * reload, with 8-byte bursts. + * + * \note This function wait until the transfer is complete and use a blocking + * function which also makes this function blocking, hence the function + * will dead-lock if the completion or error flag never get set. + * + * \retval true if success. + * \retval false if failure. + */ +bool MultiBlockMemCopy( const void * src, void * dest, uint16_t blockSize, + uint8_t repeatCount, volatile DMA_CH_t * dmaChannel ) +{ + uint8_t flags; + + DMA_EnableChannel( dmaChannel ); + DMA_SetupBlock( dmaChannel, + src, + DMA_CH_SRCRELOAD_NONE_gc, + DMA_CH_SRCDIR_INC_gc, + dest, + DMA_CH_DESTRELOAD_NONE_gc, + DMA_CH_DESTDIR_INC_gc, + blockSize, + DMA_CH_BURSTLEN_8BYTE_gc, + repeatCount, + true ); + + DMA_StartTransfer( dmaChannel ); + + /* Wait until the completion or error flag is set. The flags + * must be cleared manually. + */ + do { + flags = DMA_ReturnStatus_non_blocking( dmaChannel ); + } while ( flags == 0); + + dmaChannel->CTRLB |= ( flags ); + + /* Check if error flag is set. */ + if ( ( flags & DMA_CH_ERRIF_bm ) != 0x00 ) { + return false; + } else { + return true; + } +} + +/*! \brief Example demonstrating block memory copy. + * + * Block size 0 = 64k. Enable the DMA channel to use first and it will be + * disabled automatically. Setup channel for copying data, increasing + * addresses, no address pointer reload, with 8-byte bursts. + * + * \note This function DO NOT wait for a completion, and this must be handled + * by the program calling this function. In this example, an interrupt. + * + * \retval true if success. + * \retval false if failure. + */ +bool BlockMemCopy( const void * src, + void * dest, + uint16_t blockSize, + volatile DMA_CH_t * dmaChannel ) +{ + DMA_EnableChannel( dmaChannel ); + + DMA_SetupBlock( dmaChannel, + src, + DMA_CH_SRCRELOAD_NONE_gc, + DMA_CH_SRCDIR_INC_gc, + dest, + DMA_CH_DESTRELOAD_NONE_gc, + DMA_CH_DESTDIR_INC_gc, + blockSize, + DMA_CH_BURSTLEN_8BYTE_gc, + 0, + false ); + + DMA_StartTransfer( dmaChannel ); + + return true; +} + + diff --git a/src/drivers/dma_driver.h b/src/drivers/dma_driver.h new file mode 100644 index 0000000..2f84d17 --- /dev/null +++ b/src/drivers/dma_driver.h @@ -0,0 +1,118 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief XMEGA DMA Controller driver header file. + * + * This file contains the function prototypes and enumerator definitions + * for various configuration parameters for the XMEGA DMA driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA DMA module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * \par Application note: + * AVR1304: Using the XMEGA DMA Controller + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 2593 $ + * $Date: 2009-07-17 15:22:29 +0200 (fr, 17 jul 2009) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#ifndef DMA_DRIVER_H +#define DMA_DRIVER_H + +#include "../avr_compiler.h" + + +/*! \brief This function enable the DMA module. + * + * \note Each individual DMA channel must be enabled separately + * using the DMA_EnableChannel() function. + */ +#define DMA_Enable() ( DMA.CTRL |= DMA_ENABLE_bm ) + +/*! \brief This function disables the DMA module. + * + * \note On-going transfers will be aborted. + */ +#define DMA_Disable() ( DMA.CTRL &= ~DMA_ENABLE_bm ) + + + +/*! Prototyping of functions. */ +void DMA_Reset( void ); +void DMA_ConfigDoubleBuffering( DMA_DBUFMODE_t dbufMode ); +void DMA_SetPriority( DMA_PRIMODE_t priMode ); +uint8_t DMA_CH_IsOngoing( volatile DMA_CH_t * channel ); +uint8_t DMA_IsOngoing( void ); +uint8_t DMA_CH_IsPending( volatile DMA_CH_t * channel ); +uint8_t DMA_IsPending( void ); +uint8_t DMA_ReturnStatus_non_blocking( volatile DMA_CH_t * channel ); +uint8_t DMA_ReturnStatus_blocking( volatile DMA_CH_t * channel ); +void DMA_EnableChannel( volatile DMA_CH_t * channel ); +void DMA_DisableChannel( volatile DMA_CH_t * channel ); +void DMA_ResetChannel( volatile DMA_CH_t * channel ); +void DMA_SetIntLevel( volatile DMA_CH_t * channel, + DMA_CH_TRNINTLVL_t transferInt, + DMA_CH_ERRINTLVL_t errorInt ); +void DMA_SetupBlock( volatile DMA_CH_t * channel, + const void * srcAddr, + DMA_CH_SRCRELOAD_t srcReload, + DMA_CH_SRCDIR_t srcDirection, + void * destAddr, + DMA_CH_DESTRELOAD_t destReload, + DMA_CH_DESTDIR_t destDirection, + uint16_t blockSize, + DMA_CH_BURSTLEN_t burstMode, + uint8_t repeatCount, + bool useRepeat ); +void DMA_EnableSingleShot( volatile DMA_CH_t * channel ); +void DMA_DisableSingleShot( volatile DMA_CH_t * channel ); +void DMA_SetTriggerSource( volatile DMA_CH_t * channel, uint8_t trigger ); +void DMA_StartTransfer( volatile DMA_CH_t * channel ); + +bool MultiBlockMemCopy( const void * src, void * dest, uint16_t blockSize, + uint8_t repeatCount, volatile DMA_CH_t * dmaChannel ); +bool BlockMemCopy( const void * src, + void * dest, + uint16_t blockSize, + volatile DMA_CH_t * dmaChannel ); +#endif diff --git a/src/drivers/port_driver.c b/src/drivers/port_driver.c new file mode 100644 index 0000000..35dd2a5 --- /dev/null +++ b/src/drivers/port_driver.c @@ -0,0 +1,193 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief + * XMEGA I/O Port driver source file. + * + * This file contains the function implementations the XMEGA I/O Port driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA I/O Port module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * Several functions use the following construct: + * "some_register = ... | (some_parameter ? SOME_BIT_bm : 0) | ..." + * Although the use of the ternary operator ( if ? then : else ) is discouraged, + * in some occasions the operator makes it possible to write pretty clean and + * neat code. In this driver, the construct is used to set or not set a + * configuration bit based on a boolean input parameter, such as + * the "some_parameter" in the example above. + * + * \par Application note: + * AVR1313: Using the XMEGA I/O Pins and External Interrupts + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 1569 $ + * $Date: 2008-04-22 13:03:43 +0200 (ti, 22 apr 2008) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#include "port_driver.h" + + + +/*! \brief Configures interrupt 0. + * + * This function configures interrupt 0 to be associated with a set of pins and + * sets the desired interrupt level. + * + * \param port The port to configure. + * \param intLevel The desired interrupt level for port interrupt 0. + * \param pinMask A mask that selects the pins to associate with port interrupt 0. + */ +void PORT_ConfigureInterrupt0( PORT_t * port, + PORT_INT0LVL_t intLevel, + uint8_t pinMask ) +{ + port->INTCTRL = ( port->INTCTRL & ~PORT_INT0LVL_gm ) | intLevel; + port->INT0MASK = pinMask; +} + + +/*! \brief Configures interrupt 1. + * + * This function configures interrupt 1 to be associated with a set of pins and + * sets the desired interrupt level. + * + * \param port The port to configure. + * \param intLevel The desired interrupt level for port interrupt 1. + * \param pinMask A mask that selects the pins to associate with port interrupt 1. + */ +void PORT_ConfigureInterrupt1( PORT_t * port, + PORT_INT1LVL_t intLevel, + uint8_t pinMask ) +{ + port->INTCTRL = ( port->INTCTRL & ~PORT_INT1LVL_gm ) | intLevel; + port->INT1MASK = pinMask; +} + + + +/*! \brief This function changes the configuration of a set of pins. + * + * \param port The port. + * \param pinMask A bit mask that selects the pins to configure. + * \param slewRateEnable Enable/disable slew rate control. + * \param invertEnable Enable/disable I/O inversion. + * \param opc Output/Pull Configuration. + * \param isc Input/Sense Configuration. + */ +void PORT_ConfigurePins( PORT_t * port, + uint8_t pinMask, + uint8_t slewRateEnable, + uint8_t invertEnable, + PORT_OPC_t opc, + PORT_ISC_t isc) +{ + /* Build pin control register value. */ + uint8_t temp = (uint8_t) opc | + isc | + (slewRateEnable ? PORT_SRLEN_bm : 0) | + (invertEnable ? PORT_INVEN_bm : 0); + + /* Configure the pins in one atomic operation. */ + + /* Save status register. */ + uint8_t sreg = SREG; + + cli(); + PORTCFG.MPCMASK = pinMask; + port->PIN0CTRL = temp; + + /* Restore status register. */ + SREG = sreg; +} + + +/*! \brief Maps a real port to virtual port 0. + * + * This function maps a real port to virtual port 0 to make some of the + * registers available in I/O space. + * + * \param realPort Selects the real port to map to virtual port 0. + */ +void PORT_MapVirtualPort0(PORTCFG_VP0MAP_t realPort) +{ + PORTCFG.VPCTRLA = ( PORTCFG.VPCTRLA & ~PORTCFG_VP0MAP_gm ) | realPort; +} + + +/*! \brief Maps a real port to virtual port 1. + * + * This function maps a real port to virtual port 1 to make some of the + * registers available in I/O space. + * + * \param realPort Selects the real port to map to virtual port 1. + */ +void PORT_MapVirtualPort1(PORTCFG_VP1MAP_t realPort) +{ + PORTCFG.VPCTRLA = ( PORTCFG.VPCTRLA & ~PORTCFG_VP1MAP_gm ) | realPort; +} + + +/*! \brief Maps a real port to virtual port 2. + * + * This function maps a real port to virtual port 2 to make some of the + * registers available in I/O space. + * + * \param realPort Selects the real port to map to virtual port 2. + */ +void PORT_MapVirtualPort2(PORTCFG_VP2MAP_t realPort) +{ + PORTCFG.VPCTRLB = ( PORTCFG.VPCTRLB & ~PORTCFG_VP2MAP_gm ) | realPort; +} + + +/*! \brief Maps a real port to virtual port 3. + * + * This function maps a real port to virtual port 3 to make some of the + * registers available in I/O space. + * + * \param realPort Selects the real port to map to virtual port 3. + */ +void PORT_MapVirtualPort3(PORTCFG_VP3MAP_t realPort) +{ + PORTCFG.VPCTRLB = ( PORTCFG.VPCTRLB & ~PORTCFG_VP3MAP_gm ) | realPort; +} diff --git a/src/drivers/port_driver.h b/src/drivers/port_driver.h new file mode 100644 index 0000000..86750b8 --- /dev/null +++ b/src/drivers/port_driver.h @@ -0,0 +1,280 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief + * XMEGA I/O Port driver header file. + * + * This file contains the function prototypes and enumerator definitions + * for various configuration parameters for the XMEGA I/O Port driver. + * + * This driver is intended for rapid prototyping and documentation + * purposes for getting started with the XMEGA I/O Ports. The driver is not + * optimized for speed or size. However, functions that are just a few + * lines of code are written as macros to eliminate function call overhead. + * When using these macros it is important to use the correct data type for + * the arguments, as this is not checked by the compiler. + * + * \par Application note: + * AVR1313: Using the XMEGA I/O Pins and External Interrupts + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 1569 $ + * $Date: 2008-04-22 13:03:43 +0200 (ti, 22 apr 2008) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +#ifndef PORT_DRIVER_H +#define PORT_DRIVER_H + +#include "../avr_compiler.h" + +/* Definitions of macros. */ + +/*! \brief This macro sets the data direction for all I/O pins in the port or + * the virtual port. + * + * /note This macro can also be used to access virtual ports. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _directionMask The direction setting mask. The direction for pin n in + * the port is controlled by bit n. A 0 means input. A 1 + * means output. + */ +#define PORT_SetDirection( _port, _directionMask) ( (_port)->DIR = _directionMask ) + + + +/*! \brief Sets the data direction of a set of pins to output + * + * This macro sets the data direction of the selected port pins to output + * without altering the data direction of the other pins in that port. + * + * \param _port Pointer to the PORT_t instance. + * \param _outputMask A bit mask of the pins to set as output. A one in bit + * location n will configure pin n as output. + */ +#define PORT_SetPinsAsOutput( _port, _outputMask ) ( (_port)->DIRSET = _outputMask ) + + + +/*! \brief Sets the data direction of a set of pins to input + * + * This macro sets the data direction of the selected port pins to input + * without altering the data direction of the other pins in that port. + * + * \param _port Pointer to the PORT_t instance. + * \param _inputMask A bit mask of the pins to set as input. A one in bit + * location n will configure pin n as input. + */ +#define PORT_SetPinsAsInput( _port, _inputMask) ( (_port)->DIRCLR = _inputMask ) + + + +/*! \brief Toggle the data direction of a set of pins + * + * This macro toggles the data direction of the selected port pins + * without altering the data direction of the other pins in that port. + * + * \param _port Pointer to the PORT_t instance. + * \param _toggleMask A bit mask of the pins on which to toggle input direction. + */ +#define PORT_ToggleDirection( _port, _toggleMask) ( (_port)->DIRTGL = _toggleMask ) + + + +/*! \brief This macro sets the output value/logic level of all pins in the + * I/O port or virtual port. + * + * /note This macro can also be used to access virtual ports. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _outValue The output value. Bit n in this parameter corresponds to + * pin n of the port. + */ +#define PORT_SetOutputValue( _port, _outValue) ( (_port)->OUT = _outValue ) + + + +/*! \brief Set the output value of a set of I/O pins to logic high. + * + * This macro sets the output value of a set of I/O pins to logic high. + * (Unless inverted I/O has been enabled for the pins) It does not alter the + * pins not specified in the bit mask. + * + * \param _port Pointer to the PORT_t instance. + * \param _setMask The bit mask of pins to set to logic high level. + */ +#define PORT_SetPins( _port, _setMask) ( (_port)->OUTSET = _setMask ) + + + +/*! \brief Set the output value of a set of I/O pins to logic low. + * + * This macro sets the output value of a set of I/O pins to logic low. + * (Unless inverted I/O has been enabled for the pins) It does not alter the + * pins not specified in the bit mask. + * + * \param _port Pointer to the PORT_t instance. + * \param _clearMask The bit mask of pins to set to logic low level. + */ +#define PORT_ClearPins( _port, _clearMask) ( (_port)->OUTCLR = _clearMask ) + + + +/*! \brief Toggle the output value of a set of I/O pins. + * + * This macro toggles the output value of a set of I/O pins. It does not + * alter the output value of pins not specified in the bit mask. + * + * \param _port Pointer to the PORT_t instance. + * \param _toggleMask The bit mask of pins to toggle. + */ +#define PORT_TogglePins( _port, _toggleMask ) ( (_port)->OUTTGL = _toggleMask ) + + + +/*! \brief This macro returns the current logic value of the port or virtual + * port. + * + * /note This macro can also be used to access virtual ports. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \return The current logic state of the port. + */ +#define PORT_GetPortValue( _port ) ( (_port)->IN ) + + + +/*! \brief This macro returns the current state of the interrupt flags, given by + * a bit mask, for an I/O port or a virtual port. + * + * /note This macro can also be used to access virtual ports. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _bitMask Bit mask for interrupt flags to read. + * \return The state of the interrupt flags. + */ +#define PORT_GetInterruptFlags( _port, _bitMask ) ( (_port)->INTFLAGS & _bitMask ) + + + +/*! \brief This macro clears interrupt flags, given by a bit mask, for an I/O + * port or a virtual port. + * + * /note This macro can be used for both I/O ports and virtual ports. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _bitMask Bit mask for interrupt flags to clear. + */ +#define PORT_ClearInterruptFlags( _port, _bitMask ) ( (_port)->INTFLAGS = _bitMask ) + + + +/*! \brief This macro sets a bit in the OUT register of an I/O port or virtual + * port. + * + * \note This macro is especially efficient with virtual ports, since only + * one SBI instruction is invoked. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _bitPosition Position of bit to set. + */ +#define PORT_SetOutputBit( _port, _bitPosition ) ( (_port)->OUT = (_port)->OUT | (1 << _bitPosition) ) + + + +/*! \brief This macro clears a bit in the OUT register of an I/O port or virtual + * port. + * + * \note This macro is especially efficient with virtual ports, since only + * one CBI instruction is invoked. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _bitPosition Position of bit to cleared. + */ +#define PORT_ClearOutputBit( _port, _bitPosition ) ( (_port)->OUT = (_port)->OUT & ~(1 << _bitPosition) ) + + + +/*! \brief This macro configures a pin in an I/O port or virtual port as an + * output. + * + * \note This macro is especially efficient with virtual ports, since only + * one SBI instruction is invoked. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _bitPosition Position of bit to set as output. + */ +#define PORT_SetPinAsOutput( _port, _bitPosition ) ( (_port)->DIR = (_port)->DIR | (1 << _bitPosition) ) + + + +/*! \brief This macro configures a pin in an I/O port or virtual port as an + * input. + * + * \note This macro is especially efficient with virtual ports, since only + * one CBI instruction is invoked. + * + * \param _port Pointer to the PORT_t or VPORT_t instance. + * \param _bitPosition Position of bit to set as input. + */ +#define PORT_SetPinAsInput( _port, _bitPosition ) ( (_port)->DIR = (_port)->DIR & ~(1 << _bitPosition) ) + + + +/* Prototyping of functions. Documentation is found in source file. */ + +void PORT_ConfigureInterrupt0( PORT_t * port, + PORT_INT0LVL_t intLevel, + uint8_t pinMask); + +void PORT_ConfigureInterrupt1( PORT_t * port, + PORT_INT1LVL_t intLevel, + uint8_t pinMask); + +void PORT_ConfigurePins( PORT_t * port, + uint8_t pinMask, + uint8_t slewRateEnable, + uint8_t invertEnable, + PORT_OPC_t opc, + PORT_ISC_t isc); + +void PORT_MapVirtualPort0(PORTCFG_VP0MAP_t realPort); +void PORT_MapVirtualPort1(PORTCFG_VP1MAP_t realPort); +void PORT_MapVirtualPort2(PORTCFG_VP2MAP_t realPort); +void PORT_MapVirtualPort3(PORTCFG_VP3MAP_t realPort); + + +#endif diff --git a/src/drivers/twi_driver.c b/src/drivers/twi_driver.c new file mode 100644 index 0000000..1e450a0 --- /dev/null +++ b/src/drivers/twi_driver.c @@ -0,0 +1,352 @@ +/* + * File TWI.c + * Author: Tycho Jöbsis + * Date: 13-02-2021 + */ + + +/* +* MIT License +* +* Copyright (c) 2021 TychoJ +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all +* copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +*/ + +#include "../avr_compiler.h" +#include "twi_driver.h" +#include "../config.h" + +void TWI_set_baud(TWI_t *twi, uint32_t TWI_speed){ + twi->MASTER.BAUD = TWI_BAUD(F_CPU, TWI_speed); +} + +void TWI_enable(TWI_t *twi, uint32_t TWI_speed, uint8_t timeout){ + TWI_set_baud(twi, TWI_speed); + TWI_set_acknowledge(twi, TWI_STATUS_ACK); + twi->MASTER.CTRLA = TWI_MASTER_ENABLE_bm; + TWI_set_timeout(twi, timeout); +} + +void TWI_disable(TWI_t *twi){ + twi->MASTER.CTRLA = (0 << TWI_MASTER_ENABLE_bp); +} + +void TWI_set_timeout(TWI_t *twi, uint8_t time_out){ + switch(time_out){ + case TIMEOUT_DIS: + twi->MASTER.CTRLB = TIMEOUT_DIS; + twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc; + break; + + case TIMEOUT_50US: + twi->MASTER.CTRLB = TIMEOUT_50US; + twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_UNKNOWN_gc; + break; + + case TIMEOUT_100US: + twi->MASTER.CTRLB = TIMEOUT_100US; + twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_UNKNOWN_gc; + break; + + case TIMEOUT_200US: + twi->MASTER.CTRLB = TIMEOUT_200US; + twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_UNKNOWN_gc; + break; + + default: + twi->MASTER.CTRLB = TIMEOUT_DIS; + twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc; + break; + } +} + +void TWI_set_acknowledge(TWI_t *twi, uint8_t ack){ + (ack == TWI_STATUS_ACK) ? (twi->MASTER.CTRLC = (0 << 2)) : (twi->MASTER.CTRLC = (1 << 2)); +} + +uint8_t TWI_bus_state(TWI_t *twi){ + uint8_t ret = twi->MASTER.STATUS; + if( (ret & TWI_MASTER_BUSSTATE_gm) == TWI_MASTER_BUSSTATE_UNKNOWN_gc ) { + return UNKNOWN_BUS_STATE; + } + if( (ret & TWI_MASTER_BUSSTATE_gm) != TWI_MASTER_BUSSTATE_IDLE_gc ) { + return BUS_NOT_IN_USE; + } + if( (ret & TWI_MASTER_BUSSTATE_gm) != TWI_MASTER_BUSSTATE_IDLE_gc ) { + return OWNER_OF_BUS; + } + if( (ret & TWI_MASTER_BUSSTATE_gm) != TWI_MASTER_BUSSTATE_IDLE_gc ) { + return TWI_STATUS_BUS_IN_USE; + } + return 1; +} + +void TWI_set_bus_state(TWI_t *twi, uint8_t state){ + twi->MASTER.STATUS = state; +} + +uint8_t TWI_wait_till_send(TWI_t *twi, uint8_t rw){ + uint8_t send_suc = 0; + uint16_t time_passed = 0; + + while ( !send_suc) { + + if(twi->MASTER.STATUS & (TWI_MASTER_WIF_bm << rw)) { + send_suc = 1; + } + + if(time_passed > 1000) { + return TWI_STATUS_DATA_NOT_SEND; + } + _delay_us( 1 ); + time_passed++; + } + return TWI_STATUS_OK; +} + +uint8_t TWI_wait_till_received(TWI_t *twi, uint8_t rw){ + if(TWI_wait_till_send(twi, rw) == TWI_STATUS_OK) { + return TWI_STATUS_OK; + } + return TWI_STATUS_DATA_NOT_RECEIVED; +} + +uint8_t TWI_start(TWI_t *twi, uint8_t addr, uint8_t rw){ + + if(TWI_bus_state(twi) != BUS_NOT_IN_USE) { + return TWI_bus_state(twi); + } + + if( !( (rw == READ) || (rw == WRITE) ) ) { + return TWI_STATUS_INVALID_RW; + } + + twi->MASTER.ADDR = (addr << 1) | rw; //send slave address + if(TWI_wait_till_send(twi, rw) == TWI_STATUS_DATA_NOT_SEND) { + return TWI_STATUS_DATA_NOT_SEND;// wait until sent + } + + //when RXACK is 0 an ACK has been received + if(twi->MASTER.STATUS & TWI_MASTER_RXACK_bm) { + TWI_stop(twi); + return TWI_STATUS_NACK; + } + + return TWI_STATUS_ACK; +} + +uint8_t TWI_repeated_start(TWI_t *twi, uint8_t addr, uint8_t rw){ + if(TWI_bus_state(twi) != OWNER_OF_BUS) { + return TWI_bus_state(twi); + } + + if( !( (rw == READ) || (rw == WRITE) ) ) { + return TWI_STATUS_INVALID_RW; + } + twi->MASTER.ADDR = (addr << 1) | rw; + + TWI_wait_till_send(twi, rw); + + + //when RXACK is 0 an ACK has been received + if(twi->MASTER.STATUS & TWI_MASTER_RXACK_bm) return TWI_STATUS_NACK; + + return TWI_STATUS_OK; +} + +void TWI_stop(TWI_t *twi) { + twi->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc; +} + +uint8_t TWI_send(TWI_t *twi, uint8_t data) { + twi->MASTER.DATA = data; + + if( TWI_wait_till_send(twi, WRITE) == TWI_STATUS_DATA_NOT_SEND) { + return TWI_STATUS_DATA_NOT_SEND; + } + + //when RXACK is 0 an ACK has been received + if(twi->MASTER.STATUS & TWI_MASTER_RXACK_bm) { + return TWI_STATUS_NACK; + } + + return TWI_STATUS_ACK; +} + +uint8_t TWI_read(TWI_t *twi, uint8_t *data, uint8_t go_on){ + if(TWI_wait_till_received(twi, READ) == TWI_STATUS_DATA_NOT_RECEIVED) { + return TWI_STATUS_DATA_NOT_RECEIVED; + } + (*data) = twi->MASTER.DATA; + twi->MASTER.CTRLC = ((go_on == TWI_STATUS_ACK) // send ack (go on) or + ? TWI_MASTER_CMD_RECVTRANS_gc + : TWI_MASTER_ACKACT_bm|TWI_MASTER_CMD_STOP_gc);// nack (and stop) + return TWI_STATUS_OK; +} + +uint8_t TWI_send_8bit(TWI_t *twi, uint8_t addr, uint8_t data){ + uint8_t err; + + err = TWI_start(twi, addr, WRITE); + + //check for errors + if(err == TWI_STATUS_BUS_IN_USE) { + return TWI_STATUS_BUS_IN_USE; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + err = TWI_send(twi, data); + + //check for errors + if(err == TWI_STATUS_DATA_NOT_SEND) { + return TWI_STATUS_DATA_NOT_SEND; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + TWI_stop(twi); + + return TWI_STATUS_OK; +} + +uint8_t TWI_write_8bit_register(TWI_t *twi, uint8_t addr, uint8_t data, uint8_t reg){ + uint8_t err; + + err = TWI_start(twi, addr, WRITE); + + //check for errors + if(err == TWI_STATUS_BUS_IN_USE) { + return TWI_STATUS_BUS_IN_USE; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + err = TWI_send(twi, reg); + + //check for errors + if(err == TWI_STATUS_DATA_NOT_SEND) { + return TWI_STATUS_DATA_NOT_SEND; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + err = TWI_send(twi, data); + + //check for errors + if(err == TWI_STATUS_DATA_NOT_SEND) { + return TWI_STATUS_DATA_NOT_SEND; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + TWI_stop(twi); + + return TWI_STATUS_OK; +} + +uint8_t TWI_read_8bit_register(TWI_t *twi, uint8_t addr, uint8_t *data, uint8_t reg){ + uint8_t err; + + err = TWI_start(twi, addr, WRITE); + + //check for errors + if(err == TWI_STATUS_BUS_IN_USE) { + return TWI_STATUS_BUS_IN_USE; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + err = TWI_send(twi, reg); + + //check for errors + if(err == TWI_STATUS_DATA_NOT_SEND) { + return TWI_STATUS_DATA_NOT_SEND; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + //err = repeated_start_TWI(twi, addr, READ); + twi->MASTER.ADDR = (addr << 1) | READ; + while( ! (twi->MASTER.STATUS & (TWI_MASTER_WIF_bm << READ)) ); // wait until sent + + //check for errors + if(err == TWI_STATUS_BUS_IN_USE) { + return TWI_STATUS_BUS_IN_USE; + } + if(err == TWI_STATUS_NACK) { + return TWI_STATUS_NACK; + } + + err = TWI_read(twi, data, TWI_STATUS_NACK); + + if(err == TWI_STATUS_DATA_NOT_RECEIVED) { + return TWI_STATUS_DATA_NOT_RECEIVED; + } + + return TWI_STATUS_OK; +} + + +uint8_t TWI_read_16bit_register(TWI_t *twi, uint8_t addr, uint16_t *data, uint8_t reg){ + uint8_t err; + uint8_t temp = 0; + + err = TWI_start(twi, addr, WRITE); + + //check for errors + if(err == TWI_STATUS_BUS_IN_USE) return TWI_STATUS_BUS_IN_USE; + if(err == TWI_STATUS_NACK) return TWI_STATUS_NACK; + + err = TWI_send(twi, reg); + + //check for errors + if(err == TWI_STATUS_DATA_NOT_SEND) return TWI_STATUS_DATA_NOT_SEND; + if(err == TWI_STATUS_NACK) return TWI_STATUS_NACK; + + //err = repeated_start_TWI(twi, addr, READ); + twi->MASTER.ADDR = (addr << 1) | READ; + while( ! (twi->MASTER.STATUS & (TWI_MASTER_WIF_bm << READ)) ); // wait until sent + + //check for errors + if(err == TWI_STATUS_BUS_IN_USE) return TWI_STATUS_BUS_IN_USE; + if(err == TWI_STATUS_NACK) return TWI_STATUS_NACK; + + err = TWI_read(twi, &temp, TWI_STATUS_ACK); // Read HIGH byte to temp + + if(err == TWI_STATUS_DATA_NOT_RECEIVED) return TWI_STATUS_DATA_NOT_RECEIVED; + + *data |= (temp << 8); // Add HIGH byte + + err = TWI_read(twi, &temp, TWI_STATUS_NACK); // Read LOW byte + + if(err == TWI_STATUS_DATA_NOT_RECEIVED) return TWI_STATUS_DATA_NOT_RECEIVED; + + *data |= temp; // Add LOW byte + + return TWI_STATUS_OK; +} diff --git a/src/drivers/twi_driver.h b/src/drivers/twi_driver.h new file mode 100644 index 0000000..662a44a --- /dev/null +++ b/src/drivers/twi_driver.h @@ -0,0 +1,142 @@ +/* + * File TWI.h + * Author: Tycho Jöbsis + * Date: 13-02-2021 + */ + +/* +* MIT License +* +* Copyright (c) 2021 TychoJ +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all +* copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +*/ + + +#include + +#ifndef TWI_H_ +#define TWI_H_ + +#define BAUD_100K 100000UL +#define BAUD_400K 400000UL + +#define TIMEOUT_DIS TWI_MASTER_TIMEOUT_DISABLED_gc +#define TIMEOUT_50US TWI_MASTER_TIMEOUT_50US_gc +#define TIMEOUT_100US TWI_MASTER_TIMEOUT_100US_gc +#define TIMEOUT_200US TWI_MASTER_TIMEOUT_200US_gc + +#define UNKNOWN_BUS_STATE 0 +#define BUS_NOT_IN_USE 1 +#define OWNER_OF_BUS 2 +#define TWI_STATUS_BUS_IN_USE 3 + +#define UNKNOWN_BUS_STATE_GR TWI_MASTER_BUSSTATE_UNKNOWN_gc +#define BUS_NOT_IN_USE_GR TWI_MASTER_BUSSTATE_IDLE_gc +#define OWNER_OF_BUS_GR TWI_MASTER_BUSSTATE_OWNER_gc +#define BUS_IN_USE_GR TWI_MASTER_BUSSTATE_BUSY_gc + +#define WRITE 0 +#define READ 1 + +#define TWI_STATUS_NACK 0 +#define TWI_STATUS_ACK 1 + +#define TWI_STATUS_DATA_NOT_SEND 10 +#define TWI_STATUS_DATA_NOT_RECEIVED 7 +#define TWI_STATUS_INVALID_RW 4 +#define TWI_STATUS_OK 5 + +//inline function to calculate the baud value +#define TWI_BAUD(F_SYS, F_TWI) ((F_SYS / (2 * F_TWI)) - 5) + +//set the baud rate of a TWI module +void TWI_set_baud(TWI_t *twi, uint32_t TWI_speed); + +//enables a TWI module +//TWI_speed is used to calculate the baud rate +//timeout: if you are the only master you should use TIMEOUT_DIS +void TWI_enable(TWI_t *twi, uint32_t TWI_speed, uint8_t timeout); + +//disables a TWI module +void TWI_disable(TWI_t *twi); + +//time in us after which it's assumed the TWI bus is free + +// disabled(normally used for i2c), 50us, 100us, 200us +void TWI_set_timeout(TWI_t *twi, uint8_t time_out); + +//selects if ACK or NACK will be used +void TWI_set_acknowledge(TWI_t *twi, uint8_t ack); + +//returns in what state the bus is +uint8_t TWI_bus_state(TWI_t *twi); + +//function used for setting the bus state +void TWI_set_bus_state(TWI_t *twi, uint8_t state); + +uint8_t TWI_wait_till_send(TWI_t *twi, uint8_t rw); + +uint8_t TWI_wait_till_received(TWI_t *twi, uint8_t rw); + +//issues an start condition and send an address +//returns 1 if an acknowledge is received +//returns 0 if a not acknowledge is received +//returns 3 if the bus is not free +uint8_t TWI_start(TWI_t *twi, uint8_t addr, uint8_t rw); + +uint8_t TWI_repeated_start(TWI_t *twi, uint8_t addr, uint8_t rw); + +//issues a stop condition +void TWI_stop(TWI_t *twi); + +//internal function used for sending data +uint8_t TWI_send(TWI_t *twi, uint8_t data); + +//internal function used to read data +//twi for what twi module +//data pointer to store read data +//go_on to continue or stop reading data +//returns 7 when data is not received +//returns 5 if data is received and no errors have occurred +//go_on 1 continue 0 stop reading +uint8_t TWI_read(TWI_t *twi, uint8_t *data, uint8_t go_on); + +//send 8bits to the address +uint8_t TWI_send_8bit(TWI_t *twi, uint8_t addr, uint8_t data); + +//twi is the TWI port +//addr is the address of the TWI device were you want to write to a register +//data is the data that you want to write in the register +//reg is the register to which you want to write the data +uint8_t TWI_write_8bit_register(TWI_t *twi, uint8_t addr, uint8_t data, uint8_t reg); + +//twi is the TWI port +//addr is the address of the TWI device were you want to read a register +//data is the variable where you want to store the data +//reg is the register you want to read data from +uint8_t TWI_read_8bit_register(TWI_t *twi, uint8_t addr, uint8_t *data, uint8_t reg); + +//twi is the TWI port +//addr is the address of the TWI device were you want to read a register +//data is the variable where you want to store the data +//reg is the register you want to read data from +uint8_t TWI_read_16bit_register(TWI_t *twi, uint8_t addr, uint16_t *data, uint8_t reg); + +#endif /* TWI_H_ */ \ No newline at end of file diff --git a/src/drivers/usart_driver.c b/src/drivers/usart_driver.c new file mode 100644 index 0000000..31bd65f --- /dev/null +++ b/src/drivers/usart_driver.c @@ -0,0 +1,319 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief + * XMEGA USART driver source file. + * + * This file contains the function implementations the XMEGA interrupt + * and polled USART driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA ADC module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * Some functions use the following construct: + * "some_register = ... | (some_parameter ? SOME_BIT_bm : 0) | ..." + * Although the use of the ternary operator ( if ? then : else ) is discouraged, + * in some occasions the operator makes it possible to write pretty clean and + * neat code. In this driver, the construct is used to set or not set a + * configuration bit based on a boolean input parameter, such as + * the "some_parameter" in the example above. + * + * \par Application note: + * AVR1307: Using the XMEGA USART + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 1694 $ + * $Date: 2008-07-29 14:21:58 +0200 (ti, 29 jul 2008) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#include "usart_driver.h" + + + +/*! \brief Initializes buffer and selects what USART module to use. + * + * Initializes receive and transmit buffer and selects what USART module to use, + * and stores the data register empty interrupt level. + * + * \param usart_data The USART_data_t struct instance. + * \param usart The USART module. + * \param dreIntLevel Data register empty interrupt level. + */ +void USART_InterruptDriver_Initialize(USART_data_t * usart_data, + USART_t * usart, + USART_DREINTLVL_t dreIntLevel) +{ + usart_data->usart = usart; + usart_data->dreIntLevel = dreIntLevel; + + usart_data->buffer.RX_Tail = 0; + usart_data->buffer.RX_Head = 0; + usart_data->buffer.TX_Tail = 0; + usart_data->buffer.TX_Head = 0; +} + + +/*! \brief Set USART DRE interrupt level. + * + * Set the interrupt level on Data Register interrupt. + * + * \note Changing the DRE interrupt level in the interrupt driver while it is + * running will not change the DRE interrupt level in the USART before the + * DRE interrupt have been disabled and enabled again. + * + * \param usart_data The USART_data_t struct instance + * \param dreIntLevel Interrupt level of the DRE interrupt. + */ +void USART_InterruptDriver_DreInterruptLevel_Set(USART_data_t * usart_data, + USART_DREINTLVL_t dreIntLevel) +{ + usart_data->dreIntLevel = dreIntLevel; +} + + +/*! \brief Test if there is data in the transmitter software buffer. + * + * This function can be used to test if there is free space in the transmitter + * software buffer. + * + * \param usart_data The USART_data_t struct instance. + * + * \retval true There is data in the receive buffer. + * \retval false The receive buffer is empty. + */ +bool USART_TXBuffer_FreeSpace(USART_data_t * usart_data) +{ + /* Make copies to make sure that volatile access is specified. */ + uint8_t tempHead = (usart_data->buffer.TX_Head + 1) & USART_TX_BUFFER_MASK; + uint8_t tempTail = usart_data->buffer.TX_Tail; + + /* There are data left in the buffer unless Head and Tail are equal. */ + return (tempHead != tempTail); +} + + + +/*! \brief Put data (5-8 bit character). + * + * Stores data byte in TX software buffer and enables DRE interrupt if there + * is free space in the TX software buffer. + * + * \param usart_data The USART_data_t struct instance. + * \param data The data to send. + */ +bool USART_TXBuffer_PutByte(USART_data_t * usart_data, uint8_t data) +{ + uint8_t tempCTRLA; + uint8_t tempTX_Head; + bool TXBuffer_FreeSpace; + USART_Buffer_t * TXbufPtr; + + TXbufPtr = &usart_data->buffer; + TXBuffer_FreeSpace = USART_TXBuffer_FreeSpace(usart_data); + + if(TXBuffer_FreeSpace) + { + tempTX_Head = TXbufPtr->TX_Head; + TXbufPtr->TX[tempTX_Head] = data; + /* Advance buffer head. */ + TXbufPtr->TX_Head = (tempTX_Head + 1) & USART_TX_BUFFER_MASK; + + /* Enable DRE interrupt. */ + tempCTRLA = usart_data->usart->CTRLA; + tempCTRLA = (tempCTRLA & ~USART_DREINTLVL_gm) | usart_data->dreIntLevel; + usart_data->usart->CTRLA = tempCTRLA; + } + return TXBuffer_FreeSpace; +} + + + +/*! \brief Test if there is data in the receive software buffer. + * + * This function can be used to test if there is data in the receive software + * buffer. + * + * \param usart_data The USART_data_t struct instance + * + * \retval true There is data in the receive buffer. + * \retval false The receive buffer is empty. + */ +bool USART_RXBufferData_Available(USART_data_t * usart_data) +{ + /* Make copies to make sure that volatile access is specified. */ + uint8_t tempHead = usart_data->buffer.RX_Head; + uint8_t tempTail = usart_data->buffer.RX_Tail; + + /* There are data left in the buffer unless Head and Tail are equal. */ + return (tempHead != tempTail); +} + + + +/*! \brief Get received data (5-8 bit character). + * + * The function USART_RXBufferData_Available should be used before this + * function is used to ensure that data is available. + * + * Returns data from RX software buffer. + * + * \param usart_data The USART_data_t struct instance. + * + * \return Received data. + */ +uint8_t USART_RXBuffer_GetByte(USART_data_t * usart_data) +{ + USART_Buffer_t * bufPtr; + uint8_t ans; + + bufPtr = &usart_data->buffer; + ans = (bufPtr->RX[bufPtr->RX_Tail]); + + /* Advance buffer tail. */ + bufPtr->RX_Tail = (bufPtr->RX_Tail + 1) & USART_RX_BUFFER_MASK; + + return ans; +} + + + +/*! \brief RX Complete Interrupt Service Routine. + * + * RX Complete Interrupt Service Routine. + * Stores received data in RX software buffer. + * + * \param usart_data The USART_data_t struct instance. + */ +bool USART_RXComplete(USART_data_t * usart_data) +{ + USART_Buffer_t * bufPtr; + bool ans; + + bufPtr = &usart_data->buffer; + /* Advance buffer head. */ + uint8_t tempRX_Head = (bufPtr->RX_Head + 1) & USART_RX_BUFFER_MASK; + + /* Check for overflow. */ + uint8_t tempRX_Tail = bufPtr->RX_Tail; + uint8_t data = usart_data->usart->DATA; + + if (tempRX_Head == tempRX_Tail) { + ans = false; + }else{ + ans = true; + usart_data->buffer.RX[usart_data->buffer.RX_Head] = data; + usart_data->buffer.RX_Head = tempRX_Head; + } + return ans; +} + + + +/*! \brief Data Register Empty Interrupt Service Routine. + * + * Data Register Empty Interrupt Service Routine. + * Transmits one byte from TX software buffer. Disables DRE interrupt if buffer + * is empty. Argument is pointer to USART (USART_data_t). + * + * \param usart_data The USART_data_t struct instance. + */ +void USART_DataRegEmpty(USART_data_t * usart_data) +{ + USART_Buffer_t * bufPtr; + bufPtr = &usart_data->buffer; + + /* Check if all data is transmitted. */ + uint8_t tempTX_Tail = usart_data->buffer.TX_Tail; + if (bufPtr->TX_Head == tempTX_Tail){ + /* Disable DRE interrupts. */ + uint8_t tempCTRLA = usart_data->usart->CTRLA; + tempCTRLA = (tempCTRLA & ~USART_DREINTLVL_gm) | USART_DREINTLVL_OFF_gc; + usart_data->usart->CTRLA = tempCTRLA; + + }else{ + /* Start transmitting. */ + uint8_t data = bufPtr->TX[usart_data->buffer.TX_Tail]; + usart_data->usart->DATA = data; + + /* Advance buffer tail. */ + bufPtr->TX_Tail = (bufPtr->TX_Tail + 1) & USART_TX_BUFFER_MASK; + } +} + + +/*! \brief Put data (9 bit character). + * + * Use the function USART_IsTXDataRegisterEmpty before using this function to + * put 9 bit character to the TX register. + * + * \param usart The USART module. + * \param data The data to send. + */ +void USART_NineBits_PutChar(USART_t * usart, uint16_t data) +{ + if(data & 0x0100) { + usart->CTRLB |= USART_TXB8_bm; + }else { + usart->CTRLB &= ~USART_TXB8_bm; + } + + usart->DATA = (data & 0x00FF); +} + + +/*! \brief Get received data (9 bit character). + * + * This function reads out the received 9 bit character (uint16_t). + * Use the function USART_IsRXComplete to check if anything is received. + * + * \param usart The USART module. + * + * \retval Received data. + */ +uint16_t USART_NineBits_GetChar(USART_t * usart) +{ + if(usart->CTRLB & USART_RXB8_bm) { + return(0x0100 | usart->DATA); + }else { + return(usart->DATA); + } +} diff --git a/src/drivers/usart_driver.h b/src/drivers/usart_driver.h new file mode 100644 index 0000000..b20876f --- /dev/null +++ b/src/drivers/usart_driver.h @@ -0,0 +1,306 @@ +/* This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief XMEGA USART driver header file. + * + * This file contains the function prototypes and enumerator definitions + * for various configuration parameters for the XMEGA USART driver. + * + * The driver is not intended for size and/or speed critical code, since + * most functions are just a few lines of code, and the function call + * overhead would decrease code performance. The driver is intended for + * rapid prototyping and documentation purposes for getting started with + * the XMEGA ADC module. + * + * For size and/or speed critical code, it is recommended to copy the + * function contents directly into your application instead of making + * a function call. + * + * \par Application note: + * AVR1307: Using the XMEGA USART + * + * \par Documentation + * For comprehensive code documentation, supported compilers, compiler + * settings and supported devices see readme.html + * + * \author + * Atmel Corporation: http://www.atmel.com \n + * Support email: avr@atmel.com + * + * $Revision: 1694 $ + * $Date: 2008-07-29 14:21:58 +0200 (ti, 29 jul 2008) $ \n + * + * Copyright (c) 2008, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ +#ifndef USART_DRIVER_H +#define USART_DRIVER_H + +#include "../avr_compiler.h" + +/* USART buffer defines. */ + +/* \brief Receive buffer size: 2,4,8,16,32,64,128 or 256 bytes. */ +#define USART_RX_BUFFER_SIZE 4 +/* \brief Transmit buffer size: 2,4,8,16,32,64,128 or 256 bytes */ +#define USART_TX_BUFFER_SIZE 4 +/* \brief Receive buffer mask. */ +#define USART_RX_BUFFER_MASK ( USART_RX_BUFFER_SIZE - 1 ) +/* \brief Transmit buffer mask. */ +#define USART_TX_BUFFER_MASK ( USART_TX_BUFFER_SIZE - 1 ) + + +#if ( USART_RX_BUFFER_SIZE & USART_RX_BUFFER_MASK ) +#error RX buffer size is not a power of 2 +#endif +#if ( USART_TX_BUFFER_SIZE & USART_TX_BUFFER_MASK ) +#error TX buffer size is not a power of 2 +#endif + + +/* \brief USART transmit and receive ring buffer. */ +typedef struct USART_Buffer +{ + /* \brief Receive buffer. */ + volatile uint8_t RX[USART_RX_BUFFER_SIZE]; + /* \brief Transmit buffer. */ + volatile uint8_t TX[USART_TX_BUFFER_SIZE]; + /* \brief Receive buffer head. */ + volatile uint8_t RX_Head; + /* \brief Receive buffer tail. */ + volatile uint8_t RX_Tail; + /* \brief Transmit buffer head. */ + volatile uint8_t TX_Head; + /* \brief Transmit buffer tail. */ + volatile uint8_t TX_Tail; +} USART_Buffer_t; + + +/*! \brief Struct used when interrupt driven driver is used. +* +* Struct containing pointer to a usart, a buffer and a location to store Data +* register interrupt level temporary. +*/ +typedef struct Usart_and_buffer +{ + /* \brief Pointer to USART module to use. */ + USART_t * usart; + /* \brief Data register empty interrupt level. */ + USART_DREINTLVL_t dreIntLevel; + /* \brief Data buffer. */ + USART_Buffer_t buffer; +} USART_data_t; + + +/* Macros. */ + +/*! \brief Macro that sets the USART frame format. + * + * Sets the frame format, Frame Size, parity mode and number of stop bits. + * + * \param _usart Pointer to the USART module + * \param _charSize The character size. Use USART_CHSIZE_t type. + * \param _parityMode The parity Mode. Use USART_PMODE_t type. + * \param _twoStopBits Enable two stop bit mode. Use bool type. + */ +#define USART_Format_Set(_usart, _charSize, _parityMode, _twoStopBits) \ + (_usart)->CTRLC = (uint8_t) _charSize | _parityMode | \ + (_twoStopBits ? USART_SBMODE_bm : 0) + + +/*! \brief Set USART baud rate. + * + * Sets the USART's baud rate register. + * + * UBRR_Value : Value written to UBRR + * ScaleFactor : Time Base Generator Scale Factor + * + * Equation for calculation of BSEL value in asynchronous normal speed mode: + * If ScaleFactor >= 0 + * BSEL = ((I/O clock frequency)/(2^(ScaleFactor)*16*Baudrate))-1 + * If ScaleFactor < 0 + * BSEL = (1/(2^(ScaleFactor)*16))*(((I/O clock frequency)/Baudrate)-1) + * + * \note See XMEGA manual for equations for calculation of BSEL value in other + * modes. + * + * \param _usart Pointer to the USART module. + * \param _bselValue Value to write to BSEL part of Baud control register. + * Use uint16_t type. + * \param _bScaleFactor USART baud rate scale factor. + * Use uint8_t type + */ +#define USART_Baudrate_Set(_usart, _bselValue, _bScaleFactor) \ + (_usart)->BAUDCTRLA =(uint8_t)_bselValue; \ + (_usart)->BAUDCTRLB =(_bScaleFactor << USART_BSCALE0_bp)|(_bselValue >> 8) + + +/*! \brief Enable USART receiver. + * + * \param _usart Pointer to the USART module + */ +#define USART_Rx_Enable(_usart) ((_usart)->CTRLB |= USART_RXEN_bm) + + +/*! \brief Disable USART receiver. + * + * \param _usart Pointer to the USART module. + */ +#define USART_Rx_Disable(_usart) ((_usart)->CTRLB &= ~USART_RXEN_bm) + + +/*! \brief Enable USART transmitter. + * + * \param _usart Pointer to the USART module. + */ +#define USART_Tx_Enable(_usart) ((_usart)->CTRLB |= USART_TXEN_bm) + + +/*! \brief Disable USART transmitter. + * + * \param _usart Pointer to the USART module. + */ +#define USART_Tx_Disable(_usart) ((_usart)->CTRLB &= ~USART_TXEN_bm) + + +/*! \brief Set USART RXD interrupt level. + * + * Sets the interrupt level on RX Complete interrupt. + * + * \param _usart Pointer to the USART module. + * \param _rxdIntLevel Interrupt level of the RXD interrupt. + * Use USART_RXCINTLVL_t type. + */ +#define USART_RxdInterruptLevel_Set(_usart, _rxdIntLevel) \ + ((_usart)->CTRLA = ((_usart)->CTRLA & ~USART_RXCINTLVL_gm) | _rxdIntLevel) + + +/*! \brief Set USART TXD interrupt level. + * + * Sets the interrupt level on TX Complete interrupt. + * + * \param _usart Pointer to the USART module. + * \param _txdIntLevel Interrupt level of the TXD interrupt. + * Use USART_TXCINTLVL_t type. + */ +#define USART_TxdInterruptLevel_Set(_usart, _txdIntLevel) \ + (_usart)->CTRLA = ((_usart)->CTRLA & ~USART_TXCINTLVL_gm) | _txdIntLevel + + + +/*! \brief Set USART DRE interrupt level. + * + * Sets the interrupt level on Data Register interrupt. + * + * \param _usart Pointer to the USART module. + * \param _dreIntLevel Interrupt level of the DRE interrupt. + * Use USART_DREINTLVL_t type. + */ +#define USART_DreInterruptLevel_Set(_usart, _dreIntLevel) \ + (_usart)->CTRLA = ((_usart)->CTRLA & ~USART_DREINTLVL_gm) | _dreIntLevel + + +/*! \brief Set the mode the USART run in. + * + * Set the mode the USART run in. The default mode is asynchronous mode. + * + * \param _usart Pointer to the USART module register section. + * \param _usartMode Selects the USART mode. Use USART_CMODE_t type. + * + * USART modes: + * - 0x0 : Asynchronous mode. + * - 0x1 : Synchronous mode. + * - 0x2 : IrDA mode. + * - 0x3 : Master SPI mode. + */ +#define USART_SetMode(_usart, _usartMode) \ + ((_usart)->CTRLC = ((_usart)->CTRLC & (~USART_CMODE_gm)) | _usartMode) + + + +/*! \brief Check if data register empty flag is set. + * + * \param _usart The USART module. + */ +#define USART_IsTXDataRegisterEmpty(_usart) (((_usart)->STATUS & USART_DREIF_bm) != 0) + + + +/*! \brief Put data (5-8 bit character). + * + * Use the macro USART_IsTXDataRegisterEmpty before using this function to + * put data to the TX register. + * + * \param _usart The USART module. + * \param _data The data to send. + */ +#define USART_PutChar(_usart, _data) ((_usart)->DATA = _data) + + + +/*! \brief Checks if the RX complete interrupt flag is set. + * + * Checks if the RX complete interrupt flag is set. + * + * \param _usart The USART module. + */ +#define USART_IsRXComplete(_usart) (((_usart)->STATUS & USART_RXCIF_bm) != 0) + + + + +/*! \brief Get received data (5-8 bit character). + * + * This macro reads out the RX register. + * Use the macro USART_RX_Complete to check if anything is received. + * + * \param _usart The USART module. + * + * \retval Received data. + */ +#define USART_GetChar(_usart) ((_usart)->DATA) + + +/* Functions for interrupt driven driver. */ +void USART_InterruptDriver_Initialize(USART_data_t * usart_data, + USART_t * usart, + USART_DREINTLVL_t dreIntLevel ); + +void USART_InterruptDriver_DreInterruptLevel_Set(USART_data_t * usart_data, + USART_DREINTLVL_t dreIntLevel); + +bool USART_TXBuffer_FreeSpace(USART_data_t * usart_data); +bool USART_TXBuffer_PutByte(USART_data_t * usart_data, uint8_t data); +bool USART_RXBufferData_Available(USART_data_t * usart_data); +uint8_t USART_RXBuffer_GetByte(USART_data_t * usart_data); +bool USART_RXComplete(USART_data_t * usart_data); +void USART_DataRegEmpty(USART_data_t * usart_data); + +/* Functions for polled driver. */ +void USART_NineBits_PutChar(USART_t * usart, uint16_t data); +uint16_t USART_NineBits_GetChar(USART_t * usart); + +#endif diff --git a/src/main.c b/src/main.c new file mode 100644 index 0000000..b11d8bd --- /dev/null +++ b/src/main.c @@ -0,0 +1,50 @@ +#include +#include "Si5351A/Si5351A.h" +#include "drivers/clksys_driver.h" +#include "ports.h" +#include "rds/dac.h" +#include "rds/rds.h" +#include "uecp/usart.h" +#include "uecp/uecp.h" +#include "config.h" +#include "drivers/dac_driver.h" +#include "drivers/dma_driver.h" +#include + +#include +#include +#include + + +int main(void) +{ + + ports_init();// Configure I/O pins + + clock_init();// Configure main clock + + //LED_powerup_test(); + + //LED_ta_on(); + //LED_rds_on(); + //LED_19k_on(); + + + USART_setup(); + DAC_init(); + if(eeprom_read_byte(0)==PARAMETR_RDS_READ_EEPROM){eeprom_read_block (&rds, 0x00, sizeof(rds_params_t));} + RDS_init_encoder(rds); + DAC_tick_start(); + + + while( true ) + { /*loop forever*/ + + DAC_rds_proc(); + USART_process_uecp_rx(); + USART_process_uecp_tx(); + + } + return 1; +} + diff --git a/src/ports.c b/src/ports.c new file mode 100644 index 0000000..60a6609 --- /dev/null +++ b/src/ports.c @@ -0,0 +1,158 @@ +#include "ports.h" +#include +#include "drivers/port_driver.h" +#include + +void ports_init() { + // Configure all NC as Output and set low. + + // PORT A + // PA7 ADC7 - IN + // PA6 ADC6 - IN + // PA5 - IN + // PA4 - NC + // PA3 - NC + // PA2 DAC0 - OUT + // PA1 - NC + // PA0 - NC + // PORT_SetPinAsOutput(&PORTA, PIN2_bm); + /* Configure PA5 as input, triggered on falling edge. */ + PORT_ConfigurePins( &PORTA, + PIN5_bm, + false, false, + PORT_OPC_TOTEM_gc, + PORT_ISC_FALLING_gc ); + PORT_SetDirection( &PORTA, PIN2_bm ); // Set pin 2 to be output + PORT_ClearPins ( &PORTA, PIN2_bm ); // Set pin 2 low + PORT_ConfigureInterrupt1( &PORTA, PORT_INT1LVL_MED_gc, PIN5_bm ); + /* Enable medium level interrupts in the PMIC. */ + PMIC.CTRL |= PMIC_MEDLVLEN_bm; + + // PORT B + // PB7 - TDO OUT + // PB6 - TCK IN + // PB5 - TDI IN + // PB4 - TMS IN + // PB3 - NC + // PB2 - DAC0 OUT + // PB1 - <19KHZ_IN> IN + // PB0 - AREF IN + /* Configure PB1 as input, triggered on raising edge. */ + PORT_ConfigurePins( &PORTB, + PIN1_bm, + false, false, + PORT_OPC_TOTEM_gc, + PORT_ISC_RISING_gc ); + PORT_SetDirection( &PORTB, PIN2_bm ); // Set pin 2 to be output + PORT_ConfigureInterrupt0( &PORTB, PORT_INT0LVL_HI_gc, PIN1_bm ); + /* Enable medium level interrupts in the PMIC. */ + PMIC.CTRL |= PMIC_HILVLEN_bm; + + // PORT C + // PC7 - NC + // PC6 - NC + // PC5 - NC + // PC4 - NC + // PC3 - TXD0 OUT + // PC2 - RXD0 IN + // PC1 - NC + // PC0 - NC + PORT_SetDirection(&PORTC, 0b00001000); // Set pin 3 to be output. + PORT_ClearPins (&PORTC, 0b00001000); // Set pin 3 low + + // PORT D + // PD7 - USBD+ IN_OUT + // PD6 - USBD- IN_OUT + // PD5 - IN + // PD4 - NC + // PD3 - NC + // PD2 - OUT, Wired AND (open drain) + // PD1 - OUT, Wired AND (open drain) + // PD0 - OUT, Wired AND (open drain) + PORT_ConfigurePins(&PORTD, 0b00000111, false, false, PORT_OPC_WIREDAND_gc, PORT_ISC_INPUT_DISABLE_gc); + PORT_SetDirection(&PORTD, 0b00000111); // Set pins 2, 1, 0 to be output. + PORT_SetPins (&PORTD, 0b00000111); // Set pins 2, 1, 0 high + + // PORT E + // PE7 - IN + // PE6 - OUT, Wired And (open drain) + // PE5 - NC + // PE4 - NC + // PE3 - TXD0 OUT + // PE2 - RXD0 IN + // PE1 - SCL OUT + // PE0 - SDA IN_OUT + PORT_ConfigurePins(&PORTE, 0b01000000, false, false, PORT_OPC_WIREDAND_gc, PORT_ISC_INPUT_DISABLE_gc); + PORT_SetDirection(&PORTE, 0b01001000); // Set pins 6, 3 to be output. + PORT_SetOutputValue(&PORTE, 0b01000000); // Set pins 6 high + + // PORT F + // PF7 - SCK OUT + // PF6 - MISO IN_OUT + // PF5 - MOSI IN_OUT + // PF4 - ~SS OUT + // PF3 - IN + // PF2 - OUT + // PF1 - NC + // PF0 - NC + PORT_SetDirection(&PORTF, 0b10110100); // Set pins 7, 5, 4, 2 to be output. + PORT_SetOutputValue(&PORTF, 0b00010000); // Set pins 4 high +} // eo port_setup() + +/* + * Power-up LED test ON/OFF + */ +void LED_powerup_test() { + // PD2 - OUT + // PD1 - OUT + // PD0 - OUT + // 0 - ON, 1 - OFF + + PORT_ClearPins(&PORTD, 0b00000100); + _delay_ms(1000); + PORT_SetPins(&PORTD, 0b00000100); + _delay_ms(1000); + + PORT_ClearPins(&PORTD, 0b00000010); + _delay_ms(1000); + PORT_SetPins(&PORTD, 0b00000010); + _delay_ms(1000); + + PORT_ClearPins(&PORTD, 0b00000001); + _delay_ms(1000); + PORT_SetPins(&PORTD, 0b00000001); + _delay_ms(1000); +} + + // PD2 - OUT + // PD1 - OUT + // PD0 - OUT + // 0 - ON, 1 - OFF + +/* + * LEDs ON/OFF + */ +void LED_ta_on() { + PORT_ClearPins(&PORTD, 0b00000100); + // PORT_TogglePins(&PORTD,0b00000100); +} + +void LED_ta_off() { + PORT_SetPins(&PORTD, 0b00000100); +} + +void LED_rds_on(){ + PORT_ClearPins(&PORTD, 0b00000010); +} + +void LED_rds_off() { + PORT_SetPins(&PORTD, 0b00000010); +} + +void LED_19k_on() { + PORT_ClearPins(&PORTD, 0b00000001); +} + +void LED_19k_off() { + PORT_SetPins(&PORTD, 0b00000001); +} \ No newline at end of file diff --git a/src/ports.h b/src/ports.h new file mode 100644 index 0000000..c1fc90b --- /dev/null +++ b/src/ports.h @@ -0,0 +1,15 @@ +#ifndef _PORTS_H_ +#define _PORTS_H_ + +void ports_init(); + +void LED_powerup_test(); + +void LED_ta_on(); +void LED_ta_off(); +void LED_rds_on(); +void LED_rds_off(); +void LED_19k_on(); +void LED_19k_off(); + +#endif \ No newline at end of file diff --git a/src/rds/dac.c b/src/rds/dac.c new file mode 100644 index 0000000..0dafd39 --- /dev/null +++ b/src/rds/dac.c @@ -0,0 +1,168 @@ +#include // uintptr_t +#include "../drivers/dma_driver.h" +#include "dac.h" +#include "../drivers/dac_driver.h" +#include "../rds/rds.h" +#include "../ports.h" + +static bool volatile gInterrupt_Dma_Ch0_flag = false; +static bool volatile gInterrupt_Dma_Ch1_flag = false; +/*! DMA CH0 Interrupt service routine. Clear interrupt flags after check. */ +ISR(DMA_CH0_vect) +{ + if ((DMA.INTFLAGS & DMA_CH0TRNIF_bm) == DMA_CH0TRNIF_bm) + { + gInterrupt_Dma_Ch0_flag = true; + DMA.INTFLAGS |= DMA_CH0TRNIF_bm; // Clear DMA interrupt flag + } +} +/*! DMA CH1 Interrupt service routine. Clear interrupt flags after check. */ +ISR(DMA_CH1_vect) +{ + if ((DMA.INTFLAGS & DMA_CH1TRNIF_bm) == DMA_CH1TRNIF_bm) + { + gInterrupt_Dma_Ch1_flag = true; + DMA.INTFLAGS |= DMA_CH1TRNIF_bm; // Clear DMA interrupt flag + } +} + +void DAC_tick_start() +{ + /* Enable HI interrupt level for the complete transaction and + * LOW level for error flag. + */ + DMA_SetIntLevel( &DMA.CH0, DMA_CH_TRNINTLVL_HI_gc, DMA_CH_ERRINTLVL_LO_gc ); + DMA_SetIntLevel( &DMA.CH1, DMA_CH_TRNINTLVL_HI_gc, DMA_CH_ERRINTLVL_LO_gc ); + Rds_on(); +} + +void DAC_init() +{ + // Event System + EVSYS.CH0MUX = EVSYS_CHMUX_TCC0_OVF_gc; //0xC0; // EVSYS CH0 event = TCC0 overflow + // DAC channel A + DACA.CTRLB = DAC_CH0TRIG_bm; //0x01; // DAC CH0 auto triggered by an event set in DACA.EVCTRL + DACA.CTRLC = DAC_REFSEL_AVCC_gc;// |DAC_LEFTADJ_bm; //0x11; // Use AREFA (2.0V), left adjust + DACA.EVCTRL = DAC_EVSEL_0_gc; //0x00; // Event CH0 triggers the DAC Conversion + //DACA.TIMCTRL = 0x50; // ??? // Minimum 32 CLK between conversions + DACA.CTRLA = DAC_CH0EN_bm | DAC_ENABLE_bm; // 0x05; // Enable DACA and CH0 + // DMA in double-buffer mode + DMA.CTRL = DMA_ENABLE_bm | DMA_DBUFMODE0_bm; + // DMA CH0 ------------------ + DMA.CH0.ADDRCTRL = DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc; // DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_FIXED_gc don't work! + + DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_DACA_CH0_gc; // Transfer trigger source = DAC A CH0 conversion +// DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_TCC0_OVF_gc; +// DMA.CH0.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH0_gc; // Transfer trigger source + DMA.CH0.TRFCNT = WAVE_SIZE*2 ;// Block size in bytes + DMA.CH0.REPCNT = 0; // Transfer forever + + DMA.CH0.SRCADDR0 = (register8_t) ((uint32_t)(OUT_00) >> 0); + DMA.CH0.SRCADDR1 = (register8_t) ((uint32_t)(OUT_00) >> 8); + DMA.CH0.SRCADDR2 = 0;// (register8_t) ((uint32_t)(OUT_TEMP_0) >> 16); + + DMA.CH0.DESTADDR0 = (register8_t) ((uint32_t)(&DACA.CH0DATA) >> 0); + DMA.CH0.DESTADDR1 = (register8_t) ((uint32_t)(&DACA.CH0DATA) >> 8); + DMA.CH0.DESTADDR2 = 0;// (register8_t) ((uint32_t)(&DACA.CH0DATA) >> 16); + +//SINGLE: The channel will then do a burst transfer of BURSTLEN bytes on the transfer trigger. + DMA.CH0.CTRLA = DMA_CH_REPEAT_bm | DMA_CH_SINGLE_bm | DMA_CH_BURSTLEN_2BYTE_gc; // Transfer 2 byte at one time, + DMA.CH0.CTRLA |= DMA_CH_ENABLE_bm; + + // DMA CH1 ------------------ + DMA.CH1.ADDRCTRL = DMA_CH_SRCRELOAD_BLOCK_gc | DMA_CH_SRCDIR_INC_gc | DMA_CH_DESTRELOAD_BURST_gc | DMA_CH_DESTDIR_INC_gc; // DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_FIXED_gc don't work! + + DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_DACA_CH0_gc; // Transfer trigger source = DAC A CH0 conversion +// DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_TCC0_OVF_gc; +// DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_EVSYS_CH0_gc; // Transfer trigger source + DMA.CH1.TRFCNT = WAVE_SIZE*2;// Block size in bytes + DMA.CH1.REPCNT = 0; // Transfer forever + + DMA.CH1.SRCADDR0 = (register8_t) ((uint32_t)(OUT_00) >> 0); + DMA.CH1.SRCADDR1 = (register8_t) ((uint32_t)(OUT_00) >> 8); + DMA.CH1.SRCADDR2 = 0;// (register8_t) ((uint32_t)(OUT_TEMP_1) >> 16); + + DMA.CH1.DESTADDR0 = (register8_t) ((uint32_t)(&DACA.CH0DATA) >> 0); + DMA.CH1.DESTADDR1 = (register8_t) ((uint32_t)(&DACA.CH0DATA) >> 8); + DMA.CH1.DESTADDR2 = 0;// (register8_t) ((uint32_t)(&DACA.CH0DATA) >> 16); + +//SINGLE: The channel will then do a burst transfer of BURSTLEN bytes on the transfer trigger. + DMA.CH1.CTRLA = DMA_CH_REPEAT_bm | DMA_CH_SINGLE_bm | DMA_CH_BURSTLEN_2BYTE_gc; // Transfer 2 byte at one time, + DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm; + // DMA CH2 ------------------ + return; +} + +void Wave_selection(uint16_t src[], uint8_t channel) +{ + if(channel==0) + { + DMA.CH0.SRCADDR0 = (register8_t) ((uint32_t)(src) >> 0); + DMA.CH0.SRCADDR1 = (register8_t) ((uint32_t)(src) >> 8); + DMA.CH0.SRCADDR2 = 0; + } + if(channel==1) + { + DMA.CH1.SRCADDR0 = (register8_t) ((uint32_t)(src) >> 0); + DMA.CH1.SRCADDR1 = (register8_t) ((uint32_t)(src) >> 8); + DMA.CH1.SRCADDR2 = 0; + } +} + +#ifdef USE_FLASH +//const uint16_t *p_wave[4] PROGMEM = {OUT_00_12b, OUT_01_12b, OUT_10_12b, OUT_11_12b}; +static const uint16_t * p_waves[] = { OUT_00_12b, OUT_01_12b, OUT_10_12b, OUT_11_12b }; +#else +uint16_t *p_waves[4] = {OUT_00, OUT_01, OUT_10, OUT_11}; +#endif + +uint8_t bit_buffer[ BITS_PER_GROUP ]; +uint8_t wave_array_index = 0; +uint8_t bit_buffer_pos = 0; +uint8_t prev_output = 0; +uint8_t diff_coding_output = 0; +uint8_t b_calcNextWaveArrayIndex = 1; // Calc index after the start +uint8_t b_calcNextBitBuffer = 1; // Calc bit buffer after the start + +void DAC_rds_proc(void) +{ + + if (b_calcNextBitBuffer) + { + get_rds_bits(bit_buffer); // Update bit buffer + b_calcNextBitBuffer = false; + } + + if (b_calcNextWaveArrayIndex) + { + // Differential coding + diff_coding_output = (prev_output ^ bit_buffer[ bit_buffer_pos++ ]) & 1; + prev_output = diff_coding_output; + + wave_array_index <<= 1; + wave_array_index |= diff_coding_output; // Add current bit + wave_array_index &= 0x03; + + if (bit_buffer_pos == BITS_PER_GROUP) + { + bit_buffer_pos = 0; // Don't reset wave_array_index for correct connection bit103 & bit0 + b_calcNextBitBuffer = true; + } + b_calcNextWaveArrayIndex = false; + } + + if (gInterrupt_Dma_Ch0_flag) + { + Wave_selection( p_waves[ wave_array_index ], 0); + b_calcNextWaveArrayIndex = true; + gInterrupt_Dma_Ch0_flag = false; + } + + if (gInterrupt_Dma_Ch1_flag) + { + Wave_selection( p_waves[ wave_array_index ], 1); + b_calcNextWaveArrayIndex = true; + gInterrupt_Dma_Ch1_flag = false; + } + +} diff --git a/src/rds/dac.h b/src/rds/dac.h new file mode 100644 index 0000000..670ad46 --- /dev/null +++ b/src/rds/dac.h @@ -0,0 +1,20 @@ +/* + * File: dac.h + * Author: Roma + */ + +#ifndef DAC_H +#define DAC_H + +#include "../config.h" +#include "waves.h" + +void DAC_init(); + +void DAC_tick_start(); + +void Wave_selection(uint16_t src[], uint8_t channel); + +void DAC_rds_proc(void); + +#endif /* DAC_H */ diff --git a/src/rds/rds.c b/src/rds/rds.c new file mode 100644 index 0000000..a7114be --- /dev/null +++ b/src/rds/rds.c @@ -0,0 +1,831 @@ +/* + * mpxgen - FM multiplex encoder with Stereo and RDS + * Copyright (C) 2019 Anthony96922 + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#include +#include +#include +// needed for clock time +#include +#include +#include "rds.h" +#include "../uecp/usart.h" +#include "../uecp/uecp.h" +#include "waves.h" +#include "../ports.h" + + +static uint8_t rds_group_sequence_index = 0; +static bool volatile flag_pilot_tone = true; + +/* Here, the first member of the struct must be a scalar to avoid a + warning on -Wmissing-braces with GCC < 4.8.3 + (bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53119) +*/ + +static struct rds_params_t rds_data; +/* + rds_params_t rds default + */ + + struct rds_params_t rds = { + .fl=1, + .ps = DEAFULT_PS, + .rt = DEAFULT_RT, + .ptyn = DEAFULT_PTYN, + .pi = DEAFULT_PI, + .ta = DEAFULT_TA, //OK + .tp = DEAFULT_TP, //OK .pty = 4, //OK + .pty = DEAFULT_PTY, //OK + .ms = DEAFULT_MS, //OK + .di = DEAFULT_DI, //OK + .level = DEFAULT_OUT_LEVEL, + .phase = DEFAULT_PHASE, + .mode = DEFAULT_MODE, + .group_sequence = DEFAULT_GROUP_SEQUENCE, + .group_sequence_size = DEFAULT_GROUP_SEQUENCE_SIZE, + .af = DEAFULT_AF, // 104.0 104.4 + .tx_ctime = DEAFULT_CT, + }; + + /* + rds on + write sempl rds + */ +void Rds_on() +{ + Wave_ini(rds_data.level, WAVE_SIZE); + if(TCC0.CTRLA == TC_CLKSEL_OFF_gc) + { + PMIC.CTRL |= PMIC_HILVLEN_bm;sei(); + TCC0.PER = CPU_CLOCK / WAVE_SAMPLE_FREQUENCY - 1; + TCC0.CTRLA = TC_CLKSEL_DIV1_gc; + TCC0.INTCTRLA = TC_OVFINTLVL_LO_gc; + } + LED_rds_on(); +} + /* + rds off + */ +void Rds_off() +{ + TCC0.CTRLA = TC_CLKSEL_OFF_gc; + LED_rds_off(); +} + /* + write meander + */ +void Rds_meander() +{ + WaveMeander_ini(rds_data.level, WAVE_SIZE); + if(TCC0.CTRLA == TC_CLKSEL_OFF_gc) + { + TCC0.CTRLA = TC_CLKSEL_DIV1_gc; + } + LED_rds_off(); +} + /* + write sin 57kHz + */ +void Rds_sin() +{ + WaveSin_ini(rds_data.level, WAVE_SIZE); + if(TCC0.CTRLA == TC_CLKSEL_OFF_gc) + { + TCC0.CTRLA = TC_CLKSEL_DIV1_gc; + } + LED_rds_off(); +} + /* + When the power is turned off, save the settings + */ + ISR( PORTA_INT1_vect ) + { + eeprom_write_block (&rds_data, 0x00, sizeof(rds_params_t)); + } + +ISR( TCC0_OVF_vect ) +{ + //LED_19k_off(); +} + /* + Rotates the phase relative to the pilot tone + */ +void phase_shifter(uint16_t tact) +{ + TCC0.CTRLA = TC_CLKSEL_OFF_gc; + for(uint16_t t = 0;ttm_sec=34; + utc->tm_min=32; + utc->tm_hour=11; + utc->tm_mday=23; + utc->tm_mon=2; + utc->tm_year=24;*/ + + + + if (utc->tm_min != latest_minutes) { + // Generate CT group + latest_minutes = utc->tm_min; + + uint8_t l = utc->tm_mon <= 1 ? 1 : 0; + uint16_t mjd = 14956 + utc->tm_mday + + (uint16_t)((utc->tm_year - l) * 365.25) + + (uint16_t)((utc->tm_mon + 2 + l*12) * 30.6001); + + blocks[1] |= 4 << 12 | (mjd>>15); + blocks[2] = (mjd<<1) | (utc->tm_hour>>4); + blocks[3] = (utc->tm_hour & 0xF)<<12 | utc->tm_min<<6; + + struct tm *local = localtime(&now); + + int8_t offset = local->tm_hour - utc->tm_hour; + blocks[3] |= abs(offset); + if (offset < 0) blocks[3] |= (1 << 5); + + return 1; + } + + return 0; +} + +/* Get the next AF entry + */ +static uint16_t get_next_af() { + static uint8_t af_state; + uint16_t out; + + if (rds_data.af.num_afs) { + if (af_state == 0) { + out = (AF_CODE_NUM_AFS_BASE + rds_data.af.num_afs) << 8; + out |= rds_data.af.afs[0]; + af_state += 1; + } else { + out = rds_data.af.afs[af_state] << 8; + if (rds_data.af.afs[af_state+1]) + out |= rds_data.af.afs[af_state+1]; + else + out |= AF_CODE_FILLER; + af_state += 2; + } + if (af_state >= rds_data.af.num_entries) af_state = 0; + } else { + out = AF_CODE_NO_AF << 8 | AF_CODE_FILLER; + } + + return out; +} + +/* PS group (0A) + */ +static void get_rds_ps_group(uint16_t *blocks) { + static char ps_text[8]; + static uint8_t ps_state; + + if (ps_state == 0 && rds_state.ps_update) { + strncpy(ps_text, rds_data.ps, PS_LENGTH); + rds_state.ps_update = 0; // rewind + } + + // TA + blocks[1] |= (rds_data.ta & 1) << 4; + + // MS + blocks[1] |= (rds_data.ms & 1) << 3; + + // DI + blocks[1] |= ((rds_data.di >> (3 - ps_state)) & 1) << 2; + + // PS segment address + blocks[1] |= (ps_state & 3); + + // AF + blocks[2] = get_next_af(); + + // PS + blocks[3] = ps_text[ps_state*2] << 8 | ps_text[ps_state*2+1]; + + ps_state++; + if (ps_state == 4) ps_state = 0; +} + +/* RT group (2A) + */ +static void get_rds_rt_group(uint16_t *blocks) { + static char rt_text[RT_LENGTH]; + static uint8_t rt_state; + + if (rds_state.rt_bursting) rds_state.rt_bursting--; + + if (rds_state.rt_update) { + strncpy(rt_text, rds_data.rt, RT_LENGTH); + rds_state.ab ^= 1; + rds_state.rt_update = 0; + rt_state = 0; // rewind when new RT arrives + } + + blocks[1] |= 2 << 12 | (rds_state.ab & 1) << 4 | (rt_state & 15); + blocks[2] = rt_text[rt_state*4+0] << 8 | rt_text[rt_state*4+1]; + blocks[3] = rt_text[rt_state*4+2] << 8 | rt_text[rt_state*4+3]; + + rt_state++; + if (rt_state == rds_state.rt_segments) rt_state = 0; +} + +/* ODA group (3A) + */ +static void get_rds_oda_group(uint16_t *blocks) { + blocks[1] |= 3 << 12; + + // select ODA + struct rds_oda_t this_oda = odas[oda_state.current]; + + blocks[1] |= GET_GROUP_TYPE(this_oda.group) << 1 | + GET_GROUP_VER(this_oda.group); + blocks[2] = this_oda.scb; + blocks[3] = this_oda.aid; + + oda_state.current++; + if (oda_state.current == oda_state.count) oda_state.current = 0; +} + +/* PTYN group (10A) + */ +static void get_rds_ptyn_group(uint16_t *blocks) { + static char ptyn_text[8]; + static uint8_t ptyn_state; + + if (ptyn_state == 0 && rds_state.ptyn_update) { + strncpy(ptyn_text, rds_data.ptyn, PTYN_LENGTH); + rds_state.ptyn_update = 0; + } + + blocks[1] |= 10 << 12 | (ptyn_state & 3); + blocks[2] = ptyn_text[ptyn_state*4+0] << 8 | ptyn_text[ptyn_state*4+1]; + blocks[3] = ptyn_text[ptyn_state*4+2] << 8 | ptyn_text[ptyn_state*4+3]; + + ptyn_state++; + if (ptyn_state == 2) ptyn_state = 0; +} + +// RT+ +static void init_rtplus(uint8_t group) { + register_oda(group, 0x4BD7 /* RT+ AID */, 0); + rtplus_cfg.group = group; +} + +/* RT+ group + */ +static void get_rds_rtplus_group(uint16_t *blocks) { + // RT+ block format + blocks[1] |= GET_GROUP_TYPE(rtplus_cfg.group) << 12 | + GET_GROUP_VER(rtplus_cfg.group) << 11 | + rtplus_cfg.toggle << 4 | rtplus_cfg.running << 3 | + (rtplus_cfg.type[0] & BIT_U5) >> 3; + blocks[2] = (rtplus_cfg.type[0] & BIT_L3) << 13 | + (rtplus_cfg.start[0] & BIT_L6) << 7 | + (rtplus_cfg.len[0] & BIT_L6) << 1 | + (rtplus_cfg.type[1] & BIT_U3) >> 5; + blocks[3] = (rtplus_cfg.type[1] & BIT_L5) << 11 | + (rtplus_cfg.start[1] & BIT_L6) << 5 | + (rtplus_cfg.len[1] & BIT_L5); +} + +/* Lower priority groups are placed in a subsequence + +static uint8_t get_rds_other_groups(uint16_t *blocks) { + static uint8_t group[15]; + uint8_t group_coded = 0; + + // Type 3A groups + if (++group[3] == 20) { + group[3] = 0; + get_rds_oda_group(blocks); + group_coded = 1; + } + + // Type 10A groups + if (!group_coded && ++group[10] == 10) { + group[10] = 0; + if (rds_data.ptyn[0]) { + // Do not generate a 10A group if PTYN is off + get_rds_ptyn_group(blocks); + group_coded = 1; + } + } + + // Type 11A groups + if (!group_coded && ++group[rtplus_cfg.group] == 20) { + group[rtplus_cfg.group] = 0; + get_rds_rtplus_group(blocks); + group_coded = 1; + } + + return group_coded; +} */ + +/* Creates an RDS group. + * This generates sequences of the form 0A, 2A, 0A, 2A, 0A, 2A, etc. + + +static void get_rds_group(uint16_t *blocks) { + static uint8_t state; + + // Basic block data + blocks[0] = rds_data.pi; + blocks[1] = (rds_data.tp & 1) << 10 | (rds_data.pty & 31) << 5; + blocks[2] = 0; + blocks[3] = 0; + + // Generate block content + // CT (clock time) has priority on other group types + if (!(rds_data.tx_ctime && get_rds_ct_group(blocks))) + { + if (!get_rds_other_groups(blocks)) //3A 10A 11A + { // Other groups + // These are always transmitted + if (!state) + { // Type 0A groups + get_rds_ps_group(blocks); + state++; + } + else + { // Type 2A groups + get_rds_rt_group(blocks); + if (!rds_state.rt_bursting) state++; + } + if (state == 2) state = 0; + } + //if((sty%5)==0){get_rds_ps_group(blocks); }else{get_rds_rt_group(blocks);}sty++; + + } +} */ +static void get_rds_group(uint16_t *blocks) +{ + // Basic block data + blocks[0] = rds_data.pi; + blocks[1] = (rds_data.tp & 1) << 10 | (rds_data.pty & 31) << 5; + blocks[2] = 0; + blocks[3] = 0; + + // Generate block content + // CT (clock time) has priority on other group types + if( (0 != rds_data.tx_ctime) && get_rds_ct_group( blocks ) ) + { + return; + } + if( ++rds_group_sequence_index >= rds_data.group_sequence_size ) + { + rds_group_sequence_index = 0; + } + const uint8_t group = rds_data.group_sequence[ rds_group_sequence_index ]; + if( group == PI_TP_PTY_PTYN2_10A ) + { + if( 0 != rds_data.ptyn[ 0 ] ) + { + get_rds_ptyn_group( blocks ); + return; + } + if( ++rds_group_sequence_index >= ARRAY_SIZE( rds_data.group_sequence ) ) + { + rds_group_sequence_index = 0; + } + } + switch( group ) + { + case PI_PTY_TA_MS_DI_AF2_PS2_0A://A0 + get_rds_ps_group( blocks ); + break; + + case PI_TP_PTY_AB_RT4_2A://A2 + get_rds_rt_group( blocks ); + break; + + case PI_TP_PTY_ODA_3A: + get_rds_oda_group( blocks );//A3 + break; + + case PI_TP_ODA_11A: + get_rds_rtplus_group( blocks );//A11 + break; + } +} + +static uint16_t offset_words[] = { + 0x0FC, // A + 0x198, // B + 0x168, // C + 0x1B4, // D + 0x350 // C' +}; + + + + +/* Classical CRC computation */ +static uint16_t crc(uint16_t block) { + uint16_t crc = 0; + + for (int j = 0; j < BLOCK_SIZE; j++) { + uint8_t bit = (block & MSB_BIT) != 0; + block <<= 1; + + uint8_t msb = (crc >> (POLY_DEG-1)) & 1; + crc <<= 1; + if ((msb ^ bit) != 0) crc ^= POLY; + } + return crc; +} + +// Calculate the checkword for each block and emit the bits +static void add_checkwords(uint16_t *blocks, uint8_t *bits) { + uint16_t block, check, offset_word; + for (int i = 0; i < GROUP_LENGTH; i++) { + block = blocks[i]; + offset_word = offset_words[i]; + if (((blocks[1] >> 11) & 1) && i == 3) offset_word = offset_words[5]; + check = crc(block) ^ offset_word; + for (int j = 0; j < BLOCK_SIZE; j++) { + *bits++ = ((block & (1 << (BLOCK_SIZE - 1))) != 0); + block <<= 1; + } + for (int j = 0; j < POLY_DEG; j++) { + *bits++ = ((check & (1 << (POLY_DEG - 1))) != 0); + check <<= 1; + } + } +} + +void get_rds_bits(uint8_t *bits) { + static uint16_t out_blocks[GROUP_LENGTH]; + get_rds_group(out_blocks); + add_checkwords(out_blocks, bits); +} + +//static void show_af_list(struct rds_af_t af_list) { +// float freq; +// uint8_t af_is_lf_mf = 0; +// +//// fprintf(stderr, "AF: %u,", af_list.num_afs); +// +// for (uint8_t i = 0; i < af_list.num_entries; i++) { +// if (af_list.afs[i] == AF_CODE_LFMF_FOLLOWS) { +// // The next AF will be for LF/MF +// af_is_lf_mf = 1; +// } else { +// if (af_is_lf_mf) { +//#ifdef LFMF_AF_ROW +// if (af_list.afs[i] >= 1 && af_list.afs[i] <= 15) { // LF +// freq = 153.0f + ((float)(af_list.afs[i] - 1) * 9.0f); +//// fprintf(stderr, " (LF)%.0f", freq); +// } else { //if (af_list.afs[i] >= 16 && af_list.afs[i] <= 135) { // MF +// freq = 531.0f + ((float)(af_list.afs[i] - 16) * 9.0f); +//// fprintf(stderr, " (MF)%.0f", freq); +// } +//#else +// // MF (FCC) +// freq = 530.0f + ((float)(af_list.afs[i] - 16) * 10.0f); +//// fprintf(stderr, " (MF)%.0f", freq); +//#endif +// } else { +// // FM +// freq = (float)((uint16_t)af_list.afs[i] + 875) / 10.0f; +//// fprintf(stderr, " %.1f", freq); +// } +// af_is_lf_mf = 0; +// } +// } + +// fprintf(stderr, "\n"); +//} + + +void exit_rds_encoder() { +// exit_symbol_waveforms(); +} +void set_rds_fl( uint8_t fl) +{ + rds_data.fl = fl; +} +void set_rds_pi(uint16_t pi_code) { + rds_data.pi = pi_code; +} + +void set_rds_rt(char *rt) +{ + uint8_t rt_len = strlen(rt); + rds_state.rt_update = 1; + memset(rds_data.rt, 0, RT_LENGTH); + memcpy(rds_data.rt, rt, rt_len); + + if (rt_len < RT_LENGTH) + { + /* Terminate RT with '\r' (carriage return) if RT + * is < 64 characters long + */ + rds_data.rt[rt_len++] = '\r'; + + for (int i = 0; i < RT_LENGTH + 1; i += 4) + { + if (i >= rt_len) + { + rds_state.rt_segments = i / 4; + break; + } + // We have reached the end of the text string + } + } + else + { + // Default to 16 if RT is 64 characters long + rds_state.rt_segments = 16; + } + + rds_state.rt_bursting = rds_state.rt_segments; +} + +void set_rds_ps(char *ps) { + rds_state.ps_update = 1; + memset(rds_data.ps, ' ', PS_LENGTH); + memcpy(rds_data.ps, ps, strlen(ps)); +} + +void set_rds_rtplus_flags(uint8_t running, uint8_t toggle) { + if (running > 1) running = 1; + if (toggle > 1) toggle = 1; + rtplus_cfg.running = running; + rtplus_cfg.toggle = toggle; +} + +void set_rds_rtplus_tags(uint8_t *tags) { + rtplus_cfg.type[0] = (tags[0] < 63) ? tags[0] : 0; + rtplus_cfg.start[0] = (tags[1] < 64) ? tags[1] : 0; + rtplus_cfg.len[0] = (tags[2] < 63) ? tags[2] : 0; + rtplus_cfg.type[1] = (tags[3] < 63) ? tags[3] : 0; + rtplus_cfg.start[1] = (tags[4] < 64) ? tags[4] : 0; + rtplus_cfg.len[1] = (tags[5] < 32) ? tags[5] : 0; +} + +/* + * AF stuff + */ +uint8_t add_rds_af(struct rds_af_t *af_list, float freq) { + uint16_t af; + + // check if the AF list is full + if (af_list->num_afs + 1 > MAX_AFS) { +// fprintf(stderr, "Too many AF entries.\n"); + return 1; + } + + // check if new frequency is valid + if (freq >= 87.6f && freq <= 107.9f) { // FM + af = (uint16_t)(freq * 10.0f) - 875; + af_list->afs[af_list->num_entries] = af; + af_list->num_entries += 1; +#ifdef LFMF_AF_ROW + } else if (freq >= 153.0f && freq <= 279.0f) { + af = ((uint16_t)(freq - 153.0f) / 9) + 1; + af_list->afs[af_list->num_entries+0] = AF_CODE_LFMF_FOLLOWS; + af_list->afs[af_list->num_entries+1] = af; + af_list->num_entries += 2; + } else if (freq >= 531.0f && freq <= 1602.0f) { + af = ((uint16_t)(freq - 531.0f) / 9) + 16; + af_list->afs[af_list->num_entries+0] = AF_CODE_LFMF_FOLLOWS; + af_list->afs[af_list->num_entries+1] = af; + af_list->num_entries += 2; + } else { +// fprintf(stderr, "AF must be between 87.6-107.9 MHz, " +// "153-279 kHz or 531-1602 kHz (with 9 kHz spacing)\n"); +#else + } else if (freq >= 530.0f && freq <= 1610.0f) { + af = ((uint16_t)(freq - 530.0f) / 10) + 16; + af_list->afs[af_list->num_entries+0] = AF_CODE_LFMF_FOLLOWS; + af_list->afs[af_list->num_entries+1] = af; + af_list->num_entries += 2; + } else { +// fprintf(stderr, "AF must be between 87.6-107.9 MHz " +// "or 530-1610 kHz (with 10 kHz spacing)\n"); +#endif + return 1; + } + + af_list->num_afs++; + + return 0; +} + +void set_rds_af(struct rds_af_t new_af_list) { + memcpy(&rds_data.af, &new_af_list, sizeof(struct rds_af_t)); +} + +void clear_rds_af() { + memset(&rds_data.af, 0, sizeof(struct rds_af_t)); +} + +void set_rds_pty(uint8_t pty) { + rds_data.pty = pty; +} + +void set_rds_ptyn(char *ptyn) { + rds_state.ptyn_update = 1; + if (ptyn[0]) { + memset(rds_data.ptyn, ' ', PTYN_LENGTH); + memcpy(rds_data.ptyn, ptyn, strlen(ptyn)); + } else { + memset(rds_data.ptyn, 0, PTYN_LENGTH); + } +} + +void set_rds_ta(uint8_t ta) { + rds_data.ta = ta; + if(ta==1||ta==3){LED_ta_on();}else{LED_ta_off();} +} + +void set_rds_tp(uint8_t tp) { + rds_data.tp = tp; +} + +void set_rds_ms(uint8_t ms) { + rds_data.ms = ms; +} + +void set_rds_di(uint8_t di) { + rds_data.di = di; +} + +void set_rds_ct(uint8_t ct) { + rds_data.tx_ctime = ct; +} +void set_rds_phase(uint16_t phase ) +{ + rds_data.phase = phase; + flag_pilot_tone = true; +} +void set_rds_level(uint16_t level ) +{ + rds_data.level = level; + Wave_ini(rds_data.level, WAVE_SIZE); +} +void set_rds_mode(uint8_t mode) +{ + rds_data.mode = mode; + UECP_reply_on = mode; +} +int MP_cmd_reset() +{ + CPU_CCP=0xD8; + RST_CTRL=RST_SWRST_bm; + return 0; +} +void set_rds_reset(uint8_t reset) +{ + if(reset==0x03) + {/*cool defaunt rds_params*/ + rds.fl = PARAMETR_RDS_DEFAULT; + eeprom_write_block (&rds, 0x00, sizeof(rds_params_t)); + MP_cmd_reset(); + + } + else + {/*hot restart*/ + eeprom_write_block (&rds_data, 0x00, sizeof(rds_params_t)); + MP_cmd_reset(); + } + +} +void set_rds_sequence( uint8_t index, uint8_t group) +{ + rds_data.group_sequence[ index ] = group; +} + +void set_rds_sequence_size( uint8_t size) +{ + rds_data.group_sequence_size = size; +} + +void RDS_init_encoder(struct rds_params_t rds_params) +{ +// enum rds_pty_regions region = REGION_FCC; + set_rds_fl(rds_params.fl); + if (rds_params.pty > 31) + { + rds_params.pty = 0; + } + // AF + if (rds_params.af.num_afs) + { + set_rds_af(rds_params.af); + //show_af_list(rds_params.af); + } + set_rds_pi(rds_params.pi); + set_rds_ps(rds_params.ps); + set_rds_rt(rds_params.rt); + set_rds_pty(rds_params.pty); + if (rds_params.ptyn[0]) + { + set_rds_ptyn(rds_params.ptyn); + } + set_rds_tp(rds_params.tp); + set_rds_ta(rds_params.ta); //New + set_rds_ct(1); + set_rds_ms(rds_params.ms);//set_rds_ms(1); + set_rds_di(rds_params.di);//set_rds_di(DI_STEREO); + set_rds_level(rds_params.level); + set_rds_phase(rds_params.phase); + set_rds_mode(rds_params.mode); + for(uint8_t i=0;i. + */ + +/* + * Uncomment for LF/MF AF coding for ITU region 1 & 3 9 kHz spacing + * + */ +//#define LFMF_AF_ROW + +#ifndef RDS_H +#define RDS_H + +#include + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +#define PI_PTY_TA_MS_DI_AF2_PS2_0A (00 * 2) + +// Programme Item 1A: PI, TP, PTY, RPC, LC, D:H:M + +// RadioText 2A: PI, TP, PTY, A/B, RT(4) +// 16 such groups are required to transmit 64 symbol RT +#define PI_TP_PTY_AB_RT4_2A (02 * 2) + +// Open data 3A +#define PI_TP_PTY_ODA_3A (03 * 2) + +// Any data 5A, 5B + +// PTY, PTYN 10A: PI, TP, PTY or PTYN, 4 of 8 chars of PTYN +// 2 such groups are required to transmit PTYN +#define PI_TP_PTY_PTYN2_10A (10 * 2) + +// Open data 14A +#define PI_TP_ODA_11A (11 * 2) + +// Open data 11A +#define PI_TP_EON_14A (14 * 2) +/* The RDS error-detection code generator polynomial is + * x^10 + x^8 + x^7 + x^5 + x^4 + x^3 + x^0 + */ +#define POLY 0x1B9 +#define POLY_DEG 10 +#define MSB_BIT 0x8000 +#define BLOCK_SIZE 16 + +#define GROUP_LENGTH 4 +#define BITS_PER_GROUP (GROUP_LENGTH * (BLOCK_SIZE + POLY_DEG)) + +#define PARAMETR_RDS_DEFAULT 0 +#define PARAMETR_RDS_READ_EEPROM 1 + +#define DI_STEREO (1 << 0) // 1 - Stereo +#define DI_AH (1 << 1) // 2 - Artificial Head +#define DI_COMPRESSED (1 << 2) // 4 - Compressed +#define DI_DPTY (1 << 3) // 8 - Dynamic PTY + +#define MS_SPEECH 0 +#define MS_MUSIC 1 + +#define PTY_CODE_MAX 31 + +#define PTY_EUROPE_NO_PTY 0 +#define PTY_EUROPE_NEWS 1 +#define PTY_EUROPE_CURRENT_AFFAIRS 2 +#define PTY_EUROPE_INFORMATION 3 +#define PTY_EUROPE_SPORT 4 +#define PTY_EUROPE_EDUACTION 5 +#define PTY_EUROPE_DRAMA 6 +#define PTY_EUROPE_CULTURE 7 +#define PTY_EUROPE_SCIENCE 8 +#define PTY_EUROPE_VARIED 9 +#define PTY_EUROPE_POPULAR_MUSIC 10 +#define PTY_EUROPE_ROCK_MUSIC 11 +#define PTY_EUROPE_EASY_LISTENING 12 +#define PTY_EUROPE_LIGHT_CLASSICAL 13 +#define PTY_EUROPE_SERIOUS_CLASSICAL 14 +#define PTY_EUROPE_OTHER_MUSIC 15 +#define PTY_EUROPE_WEATHER 16 +#define PTY_EUROPE_FINANCE 17 +#define PTY_EUROPE_CHILDREN_PROGRAMMES 18 +#define PTY_EUROPE_SOCIAL_AFFAIRS 19 +#define PTY_EUROPE_RELIGION 20 +#define PTY_EUROPE_PHONE_IN 21 +#define PTY_EUROPE_TRAVEL 22 +#define PTY_EUROPE_LEISURE 23 +#define PTY_EUROPE_JAZZ_MUSIC 24 +#define PTY_EUROPE_COUNTRY_MUSIC 25 +#define PTY_EUROPE_NATIONAL_MUSIC 26 +#define PTY_EUROPE_OLDIES_MUSIC 27 +#define PTY_EUROPE_FOLK_MUSIC 28 +#define PTY_EUROPE_DOCUMENTARY 29 +#define PTY_EUROPE_ALARM_TEST 30 +#define PTY_EUROPE_ALARM 31 + +#define PTY_NORTH_AMERICA_NO_PTY 0 +#define PTY_NORTH_AMERICA_NEWS 1 +#define PTY_NORTH_AMERICA_INFORMATION 2 +#define PTY_NORTH_AMERICA_SPORT 3 +#define PTY_NORTH_AMERICA_TALK 4 +#define PTY_NORTH_AMERICA_ROCK 5 +#define PTY_NORTH_AMERICA_CLASSIC_ROCK 6 +#define PTY_NORTH_AMERICA_ADULT_HITS 7 +#define PTY_NORTH_AMERICA_SOFT_ROCK 8 +#define PTY_NORTH_AMERICA_TOP_40 9 +#define PTY_NORTH_AMERICA_COUNTRY_MUSIC 10 +#define PTY_NORTH_AMERICA_OLDIES_MUSIC 11 +#define PTY_NORTH_AMERICA_SOFT_MUSIC 12 +#define PTY_NORTH_AMERICA_NOSTALGIS 13 +#define PTY_NORTH_AMERICA_JAZZ 14 +#define PTY_NORTH_AMERICA_CLASSICAL 15 +#define PTY_NORTH_AMERICA_RHYTM_BLUES 16 +#define PTY_NORTH_AMERICA_SOFT_RHYTM_BLUES 17 +#define PTY_NORTH_AMERICA_LANGUAGE 18 +#define PTY_NORTH_AMERICA_RELIGIOUS_MUSIC 19 +#define PTY_NORTH_AMERICA_RELIGIOUS_TALK 20 +#define PTY_NORTH_AMERICA_PERSONALITY 21 +#define PTY_NORTH_AMERICA_PUBLIC 22 +#define PTY_NORTH_AMERICA_COLLEGE 23 +#define PTY_NORTH_AMERICA_NOT_ASSIGNED_1 24 +#define PTY_NORTH_AMERICA_NOT_ASSIGNED_2 25 +#define PTY_NORTH_AMERICA_NOT_ASSIGNED_3 26 +#define PTY_NORTH_AMERICA_NOT_ASSIGNED_4 27 +#define PTY_NORTH_AMERICA_NOT_ASSIGNED_5 28 +#define PTY_NORTH_AMERICA_WEATHER 29 +#define PTY_NORTH_AMERICA_TEST 30 +#define PTY_NORTH_AMERICA_EMERGENCY 31 + +/* AF list size + * + */ +#define MAX_AFS 25 + +typedef struct rds_af_t { + uint8_t num_entries; + uint8_t num_afs; + uint8_t afs[MAX_AFS*2]; // doubled for LF/MF coding +} rds_af_t; + +/* + * Text items + */ +#define RT_LENGTH 64 +#define PS_LENGTH 8 +#define PTYN_LENGTH 8 + +typedef struct rds_params_t { + uint8_t fl; + char ps[PS_LENGTH]; + char rt[RT_LENGTH]; + char ptyn[PTYN_LENGTH]; + uint16_t pi; + uint8_t ta; + uint8_t tp; + uint8_t pty; + uint8_t ms; + uint8_t di; + uint16_t level; + uint16_t phase; + uint8_t mode; + uint8_t group_sequence[ 0xFC ]; + uint8_t group_sequence_size; + struct rds_af_t af; + uint8_t tx_ctime; +} rds_params_t; + +// AF codes +#define AF_CODE_FILLER 205 +#define AF_CODE_NO_AF 224 +#define AF_CODE_NUM_AFS_BASE AF_CODE_NO_AF +#define AF_CODE_LFMF_FOLLOWS 250 + +/* Group type + * + * 0-15 + */ +#define GROUP_TYPE_0 (0 << 4) +#define GROUP_TYPE_1 (1 << 4) +#define GROUP_TYPE_2 (2 << 4) +#define GROUP_TYPE_3 (3 << 4) +#define GROUP_TYPE_4 (4 << 4) +#define GROUP_TYPE_5 (5 << 4) +#define GROUP_TYPE_6 (6 << 4) +#define GROUP_TYPE_7 (7 << 4) +#define GROUP_TYPE_8 (8 << 4) +#define GROUP_TYPE_9 (9 << 4) +#define GROUP_TYPE_10 (10 << 4) +#define GROUP_TYPE_11 (11 << 4) +#define GROUP_TYPE_12 (12 << 4) +#define GROUP_TYPE_13 (13 << 4) +#define GROUP_TYPE_14 (14 << 4) +#define GROUP_TYPE_15 (15 << 4) + +/* Group versions + * + * The first 4 bits are the group number and the remaining 4 are + * the group version + */ +#define GROUP_VER_A 0 +#define GROUP_VER_B 1 +/**/ +// Version A groups +#define GROUP_0A (GROUP_TYPE_0 | GROUP_VER_A) +#define GROUP_1A (GROUP_TYPE_1 | GROUP_VER_A) +#define GROUP_2A (GROUP_TYPE_2 | GROUP_VER_A) +#define GROUP_3A (GROUP_TYPE_3 | GROUP_VER_A) +#define GROUP_4A (GROUP_TYPE_4 | GROUP_VER_A) +#define GROUP_5A (GROUP_TYPE_5 | GROUP_VER_A) +#define GROUP_6A (GROUP_TYPE_6 | GROUP_VER_A) +#define GROUP_7A (GROUP_TYPE_7 | GROUP_VER_A) +#define GROUP_8A (GROUP_TYPE_8 | GROUP_VER_A) +#define GROUP_9A (GROUP_TYPE_9 | GROUP_VER_A) +#define GROUP_10A (GROUP_TYPE_10 | GROUP_VER_A) +#define GROUP_11A (GROUP_TYPE_11 | GROUP_VER_A) +#define GROUP_12A (GROUP_TYPE_12 | GROUP_VER_A) +#define GROUP_13A (GROUP_TYPE_13 | GROUP_VER_A) +#define GROUP_14A (GROUP_TYPE_14 | GROUP_VER_A) +#define GROUP_15A (GROUP_TYPE_15 | GROUP_VER_A) + +// Version B groups +#define GROUP_0B (GROUP_TYPE_0 | GROUP_VER_B) +#define GROUP_1B (GROUP_TYPE_1 | GROUP_VER_B) +#define GROUP_2B (GROUP_TYPE_2 | GROUP_VER_B) +#define GROUP_3B (GROUP_TYPE_3 | GROUP_VER_B) +#define GROUP_4B (GROUP_TYPE_4 | GROUP_VER_B) +#define GROUP_5B (GROUP_TYPE_5 | GROUP_VER_B) +#define GROUP_6B (GROUP_TYPE_6 | GROUP_VER_B) +#define GROUP_7B (GROUP_TYPE_7 | GROUP_VER_B) +#define GROUP_8B (GROUP_TYPE_8 | GROUP_VER_B) +#define GROUP_9B (GROUP_TYPE_9 | GROUP_VER_B) +#define GROUP_10B (GROUP_TYPE_10 | GROUP_VER_B) +#define GROUP_11B (GROUP_TYPE_11 | GROUP_VER_B) +#define GROUP_12B (GROUP_TYPE_12 | GROUP_VER_B) +#define GROUP_13B (GROUP_TYPE_13 | GROUP_VER_B) +#define GROUP_14B (GROUP_TYPE_14 | GROUP_VER_B) +#define GROUP_15B (GROUP_TYPE_15 | GROUP_VER_B) + +#define GET_GROUP_TYPE(x) ((x >> 4) & 15) +#define GET_GROUP_VER(x) (x & 1) // only check bit 0 + +#define DI_STEREO (1 << 0) // 1 - Stereo +#define DI_AH (1 << 1) // 2 - Artificial Head +#define DI_COMPRESSED (1 << 2) // 4 - Compressed +#define DI_DPTY (1 << 3) // 8 - Dynamic PTY + +// Bit mask +// Lower +#define BIT_L1 0x01 +#define BIT_L2 0x03 +#define BIT_L3 0x07 +#define BIT_L4 0x0f +#define BIT_L5 0x1f +#define BIT_L6 0x3f +#define BIT_L7 0x7f +// Upper +#define BIT_U7 0xfe +#define BIT_U6 0xfc +#define BIT_U5 0xf8 +#define BIT_U4 0xf0 +#define BIT_U3 0xe0 +#define BIT_U2 0xc0 +#define BIT_U1 0x80 +// Single +#define BIT_0 0x01 +#define BIT_1 0x02 +#define BIT_2 0x04 +#define BIT_3 0x08 +#define BIT_4 0x10 +#define BIT_5 0x20 +#define BIT_6 0x40 +#define BIT_7 0x80 + + + +extern struct rds_params_t rds; + +// The PTY region. This determines which PTY list to use +enum rds_pty_regions { + REGION_FCC, // NRSC RBDS + REGION_ROW // Rest of the world +}; + +void Rds_on(); +void Rds_off(); +void Rds_meander(); +void Rds_sin(); +void RDS_init_encoder(struct rds_params_t rds_params) ; +void exit_rds_encoder(); +void get_rds_bits(uint8_t *bits); +void set_rds_pi(uint16_t pi_code); +void set_rds_rt(char *rt); +void set_rds_ps(char *ps); +void set_rds_rtplus_flags(uint8_t running, uint8_t toggle); +void set_rds_rtplus_tags(uint8_t *tags); +void set_rds_ta(uint8_t ta); +void set_rds_pty(uint8_t pty); +void set_rds_ptyn(char *ptyn); +void set_rds_af(struct rds_af_t new_af_list); +uint8_t add_rds_af(struct rds_af_t *af_list, float freq); +void set_rds_tp(uint8_t tp); +void set_rds_ms(uint8_t ms); +void set_rds_ct(uint8_t ct); +void set_rds_di(uint8_t di); +void set_rds_phase(uint16_t phase ); +void set_rds_level(uint16_t level ); +void set_rds_mode(uint8_t mode); +void set_rds_reset(uint8_t reset); +void set_rds_sequence( uint8_t index, uint8_t group); +void set_rds_sequence_size( uint8_t size); +float get_rds_sample(uint8_t stream_num); + +#endif /* RDS_H */ diff --git a/src/rds/waves.c b/src/rds/waves.c new file mode 100644 index 0000000..aef878e --- /dev/null +++ b/src/rds/waves.c @@ -0,0 +1,101 @@ +#include +#include "waves.h" +#include +#include + +uint16_t OUT_00[ WAVE_SIZE ]; //= {2048, 2111, 2048, 1858, 2048, 2363, 2048, 1607, 2048, 2615, 2048, 1351, 2048, 2870, 2048, 1102, 2048, 3112, 2048, 869, 2048, 3335, 2048, 657, 2048, 3535, 2048, 470, 2048, 3708, 2048, 311, 2048, 3853, 2048, 182, 2048, 3965, 2048, 87, 2048, 4043, 2048, 26, 2048, 4086, 2048, 0, 2048, 4094, 2048, 10, 2048, 4066, 2048, 56, 2048, 4004, 2048, 135, 2048, 3907, 2048, 248, 2048, 3779, 2048, 391, 2048, 3622, 2048, 561, 2048, 3439, 2048, 757, 2048, 3232, 2048, 974, 2048, 3005, 2048, 1209, 2048, 2763, 2048, 1458, 2048, 2508, 2048, 1717, 2048, 2246, 2048, 1981, 2048, 1981, 2048, 2246, 2048, 1717, 2048, 2508, 2048, 1458, 2048, 2763, 2048, 1209, 2048, 3005, 2048, 974, 2048, 3232, 2048, 757, 2048, 3439, 2048, 561, 2048, 3622, 2048, 391, 2048, 3779, 2048, 248, 2048, 3907, 2048, 135, 2048, 4004, 2048, 56, 2048, 4066, 2048, 10, 2048, 4094, 2048, 0, 2048, 4086, 2048, 26, 2048, 4043, 2048, 87, 2048, 3965, 2048, 182, 2048, 3853, 2048, 311, 2048, 3708, 2048, 470, 2048, 3535, 2048, 657, 2048, 3335, 2048, 869, 2048, 3112, 2048, 1102, 2048, 2870, 2048, 1351, 2048, 2615, 2048, 1612, 2048, 2350, 2048, 1879, 2048, 2081}; + +uint16_t OUT_01[ WAVE_SIZE ]; //= {2048, 2150, 2048, 1809, 2048, 2420, 2048, 1543, 2048, 2681, 2048, 1289, 2048, 2927, 2048, 1052, 2048, 3153, 2048, 838, 2048, 3354, 2048, 651, 2048, 3528, 2048, 492, 2048, 3670, 2048, 366, 2048, 3780, 2048, 272, 2048, 3858, 2048, 211, 2048, 3903, 2048, 181, 2048, 3917, 2048, 181, 2048, 3903, 2048, 208, 2048, 3865, 2048, 257, 2048, 3806, 2048, 325, 2048, 3731, 2048, 406, 2048, 3646, 2048, 494, 2048, 3555, 2048, 586, 2048, 3465, 2048, 674, 2048, 3379, 2048, 755, 2048, 3303, 2048, 825, 2048, 3241, 2048, 879, 2048, 3196, 2048, 914, 2048, 3170, 2048, 930, 2048, 3165, 2048, 925, 2048, 3181, 2048, 899, 2048, 3217, 2048, 854, 2048, 3270, 2048, 792, 2048, 3340, 2048, 716, 2048, 3421, 2048, 630, 2048, 3510, 2048, 540, 2048, 3601, 2048, 449, 2048, 3689, 2048, 364, 2048, 3770, 2048, 289, 2048, 3838, 2048, 230, 2048, 3887, 2048, 192, 2048, 3914, 2048, 178, 2048, 3914, 2048, 192, 2048, 3884, 2048, 237, 2048, 3823, 2048, 315, 2048, 3729, 2048, 425, 2048, 3603, 2048, 568, 2048, 3445, 2048, 741, 2048, 3257, 2048, 942, 2048, 3043, 2048, 1168, 2048, 2806, 2048, 1414, 2048, 2552, 2048, 1675, 2048, 2286, 2048, 1945}; + +uint16_t OUT_10[ WAVE_SIZE ]; //= {2048, 1945, 2048, 2286, 2048, 1675, 2048, 2552, 2048, 1414, 2048, 2806, 2048, 1168, 2048, 3043, 2048, 942, 2048, 3257, 2048, 741, 2048, 3445, 2048, 568, 2048, 3603, 2048, 425, 2048, 3729, 2048, 315, 2048, 3823, 2048, 237, 2048, 3884, 2048, 192, 2048, 3914, 2048, 178, 2048, 3914, 2048, 192, 2048, 3887, 2048, 230, 2048, 3838, 2048, 289, 2048, 3770, 2048, 364, 2048, 3689, 2048, 449, 2048, 3601, 2048, 540, 2048, 3510, 2048, 630, 2048, 3421, 2048, 716, 2048, 3340, 2048, 792, 2048, 3270, 2048, 854, 2048, 3217, 2048, 899, 2048, 3181, 2048, 925, 2048, 3165, 2048, 930, 2048, 3170, 2048, 914, 2048, 3196, 2048, 879, 2048, 3241, 2048, 825, 2048, 3303, 2048, 755, 2048, 3379, 2048, 674, 2048, 3465, 2048, 586, 2048, 3555, 2048, 494, 2048, 3646, 2048, 406, 2048, 3731, 2048, 325, 2048, 3806, 2048, 257, 2048, 3865, 2048, 208, 2048, 3903, 2048, 181, 2048, 3917, 2048, 181, 2048, 3903, 2048, 211, 2048, 3858, 2048, 272, 2048, 3780, 2048, 366, 2048, 3670, 2048, 492, 2048, 3528, 2048, 651, 2048, 3354, 2048, 838, 2048, 3153, 2048, 1052, 2048, 2927, 2048, 1289, 2048, 2681, 2048, 1543, 2048, 2420, 2048, 1809, 2048, 2150}; + +uint16_t OUT_11[ WAVE_SIZE ]; //= {2048, 1984, 2048, 2237, 2048, 1732, 2048, 2488, 2048, 1480, 2048, 2744, 2048, 1225, 2048, 2993, 2048, 983, 2048, 3226, 2048, 760, 2048, 3438, 2048, 560, 2048, 3625, 2048, 387, 2048, 3784, 2048, 242, 2048, 3913, 2048, 130, 2048, 4008, 2048, 52, 2048, 4069, 2048, 9, 2048, 4095, 2048, 1, 2048, 4085, 2048, 29, 2048, 4039, 2048, 91, 2048, 3960, 2048, 188, 2048, 3847, 2048, 316, 2048, 3704, 2048, 473, 2048, 3534, 2048, 656, 2048, 3338, 2048, 863, 2048, 3121, 2048, 1090, 2048, 2886, 2048, 1332, 2048, 2637, 2048, 1587, 2048, 2378, 2048, 1849, 2048, 2114, 2048, 2114, 2048, 1849, 2048, 2378, 2048, 1587, 2048, 2637, 2048, 1332, 2048, 2886, 2048, 1090, 2048, 3121, 2048, 863, 2048, 3338, 2048, 656, 2048, 3534, 2048, 473, 2048, 3704, 2048, 316, 2048, 3847, 2048, 188, 2048, 3960, 2048, 91, 2048, 4039, 2048, 29, 2048, 4085, 2048, 1, 2048, 4095, 2048, 9, 2048, 4069, 2048, 52, 2048, 4008, 2048, 130, 2048, 3913, 2048, 242, 2048, 3784, 2048, 387, 2048, 3625, 2048, 560, 2048, 3438, 2048, 760, 2048, 3226, 2048, 983, 2048, 2993, 2048, 1225, 2048, 2744, 2048, 1480, 2048, 2483, 2048, 1745, 2048, 2216, 2048, 2014}; + + /// + /// Frequency generation 57 kHz + /// + /// number of samples + /// get the specified sample + /// + double WaveSin(uint16_t sample, uint16_t count) + { + double tau = 6.283;// tau 2pi + double sin57k = tau / (sample / 48); + return sin(count * sin57k); + } +/// +/// Generation Meander +/// +/// +/// +uint16_t WaveMeander(uint16_t count) +{ + return ((count % 2) == 0); +} +/// +/// The function generates a frequency of 57 kHz with amplitude modulation at a frequency of 1187.5 Hz and 2375 Hz with phase rotation +/// +/// number of samples +/// wave type 00 01 10 11 +/// get the specified sample +/// +double Wave(uint16_t sample, uint8_t waves, uint16_t count) +{ + double tau = 6.283;// tau 2pi + double sin57k = tau / (sample / 48); + double sin1187hz = tau / sample; + if (waves == 0) { return sin(count * sin57k) * sin(count * sin1187hz); }//Modulate 57 kHz with a frequency of 1187 Hz = 00 + if (waves == 1) { return sin(count * sin57k) * ((sin(count * (sin1187hz * 1.5)) * 0.4) + sin(count * (sin1187hz / 2))); }//Modulate 57 kHz with a frequency of 1187 Hz + a frequency of 2375 Hz = 01 + if (waves == 2) { return sin(count * sin57k) * ((sin((count + sample) * (sin1187hz * 1.5)) * 0.4) + sin((count + sample) * (sin1187hz / 2)) ); }//Modulate 57 kHz with a frequency of 1187 Hz + a frequency of 2375 Hz with rotation by 360 = 10 + if (waves == 3) { return sin(count * sin57k) * (sin((count + sample / 2) * sin1187hz)); }//Modulate 57 kHz with a frequency of 1187 Hz + a frequency of 2375 Hz with rotation by 180 = 11 + return 0; +} +/// +/// The function creates arrays with the specified amplitude and the specified number of samples +/// +/// amplitude +/// number of samples +void Wave_ini(int amplitude, int sample) +{ + uint16_t half = amplitude/2; + for(uint16_t i=0;i +/// The function creates arrays with the specified amplitude and the specified number of samples +/// +/// amplitude +/// number of samples +void WaveSin_ini(int amplitude, int sample) +{ + uint16_t half = amplitude/2; + for(uint16_t i=0;i +/// The function creates arrays with the specified amplitude and the specified number of samples +/// +/// amplitude +/// number of samples +void WaveMeander_ini(int amplitude, int sample) +{ + for(uint16_t i=0;i +#include +#include "uecp.h" +#include "../rds/rds.h" +#include "../ports.h" +#include "usart.h" +#include "../rds/dac.h" + +#define WORD(hi,lo) (((hi) << 8) | (lo)) + +#define UECP_MEC_PI 0x01 +#define UECP_MEC_PS 0x02 +#define UECP_MEC_TP_TA 0x03 +#define UECP_MEC_DI_PTYI 0x04 +#define UECP_MEC_MS 0x05 +#define UECP_MEC_PIN 0x06 +#define UECP_MEC_PTY 0x07 +#define UECP_MEC_CT_CORRECTION 0x09 +#define UECP_MEC_RT 0x0A +#define UECP_MEC_CT 0x0D +#define UECP_MEC_RDS_LEVEL 0x0E +#define UECP_MEC_AF 0x13 +#define UECP_MEC_EON_AF 0x14 +#define UECP_MEC_EON_TA 0x15 +#define UECP_MEC_GROUP_SEQ 0x16 +#define UECP_MEC_REQ_MSG 0x17 +#define UECP_MEC_MSG_ACK 0x18 +#define UECP_MEC_CT_ON_OFF 0x19 +#define UECP_MEC_DATA_SET 0x1C +#define UECP_MEC_REF_IN 0x1D +#define UECP_MEC_RDS_ON_OFF 0x1E +#define UECP_MEC_RDS_PHASE 0x22 +#define UECP_MEC_SITE_ADDR 0x23 +#define UECP_MEC_ENC_ADDR 0x27 +#define UECP_MEC_EWS 0x2B +#define UECP_MEC_MODE 0x2C +#define UECP_MEC_RESET 0x2D +#define UECP_MEC_EXT_GROUP_SEQ 0x38 +#define UECP_MEC_PTYN 0x3E +#define UECP_MEC_EON_EN_DIS 0x3F +/*! Array uecp response message. */ +static uint8_t uecp_response_message [UECP_REPLY_LEN]; +/*! Array to put received data in. */ +static uint8_t rxBuffer[UECP_RX_BUF_LEN_MAX]; + +uint8_t UECP_reply_on=0; + +static uint8_t start_of_frame = 0; +static uint16_t frame_length = 0; +static uint8_t staffed_detected = 0; +static uint8_t frame_processing_result = 0; + +typedef struct +{ + uint16_t add; + uint8_t sqc; + uint8_t mfl; + uint8_t mec; + uint8_t dsn; + uint8_t psn; + uint8_t mel; + uint8_t * med; + uint8_t crc; + +}uecp_fields; + +uecp_fields uecp; +/** + * uecp_crc16_ccit - Calculate the CRC of a UECP data frame + * @data: the buffer containing the data frame + * @len: the buffer's length + */ +uint16_t uecp_crc16_ccitt(uint8_t* data, uint8_t len) +{ + int i = 0; + uint16_t crc = 0xFFFF; + + for (i=0; i < len; i++) + { + crc = (uint8_t)(crc >> 8) | (crc << 8); + crc ^= data[i]; + crc ^= (uint8_t)(crc & 0xff) >> 4; + crc ^= (crc << 8) << 4; + crc ^= ((crc & 0xff) << 4) << 1; + } + + return ((crc ^= 0xFFFF) & 0xFFFF); +} + +/** + * The function checks the checksum in a string + * Example of accepted strings + * {0xFE,0x00,0x00,0x00,0x0B,0x02,0x01,0x00,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x86,0x44,0xFF}; + or {0x00,0x00,0x00,0x0B,0x02,0x01,0x00,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x86,0x44}; + * @param data + * @param len + * @return + */ +uint8_t uecp_frame_checksum(uint8_t* data) +{ + uint8_t len = data[3]+5; + uint8_t uecp_checksum = 0; + uint16_t ccitt = 1; + uint16_t sum = 2; + if(UECP_STA==data[0]&&UECP_STP==data[len-1]) + { + data++; + ccitt = uecp_crc16_ccitt(data, len-4); //sendInt(ccitt); + sum = (((data[len-4]) << 8) | (data[len-3]));//sendInt(sum); + if(ccitt==sum){uecp_checksum = 1;} + } + else + { + ccitt = uecp_crc16_ccitt(data, len-2); //sendInt(ccitt); + sum = (((data[len-2]) << 8) | (data[len-1]));//sendInt(sum); + if(ccitt==sum){uecp_checksum = 1;} + } + return uecp_checksum; +} + + +/** + * + * Example of accepted strings + * uint8_t uecp [UECP_REPLY_LEN]={0xFE,0x00,0x00,0x00,0x03,0x18,mode,0x25,0xA1,0x03,0xFF}; + * @param reply + * @param mode + * @param message_handler + */ +void uecp_send_reply(uint8_t enable_responses_from_UECP , uint8_t mode, void (*message_handler)(uint8_t * data, const uint8_t size)) +{ + if(enable_responses_from_UECP == BIDIRECTIONAL_MODE_WITH_REQUESTED_RESPONSE || enable_responses_from_UECP == BIDIRECTIONAL_MODE_WITH_SPONTANEOUS_RESPONSE) + { + uint8_t len = 0; + uint16_t crc = 0; + uecp_response_message[len++] = UECP_STA; + uecp_response_message[len++] = (uecp.add & 0xFF00) >> 8; + uecp_response_message[len++] = (uecp.add & 0xFF); + uecp_response_message[len++] = uecp.sqc; + uecp_response_message[len++] = 0x03; + uecp_response_message[len++] = 0x18; + uecp_response_message[len++] = mode; + uecp_response_message[len++] = 0x25; + crc = uecp_crc16_ccitt(uecp_response_message, 8); + uecp_response_message[len++] = (crc & 0xFF00) >> 8; + uecp_response_message[len++] = (crc & 0xFF); + uecp_response_message[len++] = UECP_STP; + (*message_handler)( uecp_response_message, UECP_REPLY_LEN ); + + } +} + +uint8_t UECP_parse_data_frame(uint8_t * data) +{ + uint8_t msg_status = UECP_STATUS_RECEIVED_OK; + + uecp.add = WORD( data[ UECP_BUFFER_INDEX_ADDR_HIGH ], data[ UECP_BUFFER_INDEX_ADDR_LOW ] ); + uecp.sqc = data[ UECP_BUFFER_INDEX_SEQUENCE ]; + uecp.mfl = data[ UECP_BUFFER_INDEX_MSG_LENGTH ]; + uecp.crc = WORD( data[ uecp.mfl + 4 ], data[ uecp.mfl + 5 ] ); + uecp.mec = data[UECP_MEC]; + + switch( uecp.mec ) + { + case UECP_MEC_PI: + { + set_rds_pi( WORD( data[7], data[8] ) ); + break; + } + case UECP_MEC_PS: + { + set_rds_ps( (char*)(data+7) ); + break; + } + case UECP_MEC_TP_TA: + { + uint8_t tp_ta = data[7]; + if( tp_ta > 3 ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; // error! + break; + } + uint8_t ta = tp_ta & 0x01; // Bit 0 + tp_ta >>= 1; + uint8_t tp = tp_ta & 0x01 ; // Bit 1 + set_rds_ta( ta ); + set_rds_tp( tp ); + break; + } + case UECP_MEC_DI_PTYI: + { + uint8_t di = data[7]; + if( di > 0x02 ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; // error! + break; + } + set_rds_di(di); + break; + } + case UECP_MEC_MS: + { + uint8_t ms = data[7]; + if( ms > 0x02 ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; // error! + break; + } + set_rds_ms(ms); + break; + } + case UECP_MEC_PTY: + { + uint8_t pty = data[7]; + if( pty > 0x1F ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; // error! + break; + } + set_rds_pty( pty ); + break; + } + case UECP_MEC_PTYN: + { + set_rds_ptyn( (char*)data+7 ); + break; + } + case UECP_MEC_RDS_ON_OFF: + { + if( data[5] > 5 ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; // error! + break; + } + uint8_t rds_on = data[5]; // 0 - turn RDS OFF, 1 - turn RDS ON + if( rds_on == 0x00 ) + { + Rds_off(); + } + if( rds_on == 0x01 ) + { + Rds_on(); + } + if( rds_on == 0x03 ) + { + Rds_meander(); + } + if( rds_on == 0x05 ) + { + Rds_sin(); + } + //TODO Stop/Start Timer0 (DAC clock) + break; + } + case UECP_MEC_RT: + { + if( (uecp.mfl-5) > (RT_LENGTH + 1) ) + {// 64+1 + msg_status = UECP_STATUS_MEL_ERROR; // error! + break; + } + set_rds_rt( (char*)data+9); + break; + } + case UECP_MEC_CT: + { + + break; + } + case UECP_MEC_MODE: + { + if( data[5] > 0x03 ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; // error! + break; + } + set_rds_mode( data[5] ); + break; + } + case UECP_MEC_RDS_LEVEL: + { + set_rds_level( WORD( data[5], data[6] ) ); + break; + } + case UECP_MEC_AF: + { + if(rxBuffer[10]>0xE0) + { + uint8_t af_count = rxBuffer[10]-0xE0; + struct rds_af_t af; + af.num_entries = 4; + af.num_afs = af_count; + for(uint8_t i=0;i 0x03 ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; // error! + break; + } + set_rds_reset(reset); + break; + } + case UECP_MEC_EON_AF: + { + break; + } + case UECP_MEC_EON_TA: + { + break; + } + case UECP_MEC_GROUP_SEQ: + {// page 88 + uint8_t len = data[3]; + if( (len < 1) || (len > 0xFC) ) + { + msg_status = UECP_STATUS_PARAM_OUT_OF_RANGE; + } + else + { + uint8_t count = (len-3); + for(uint8_t i=0;i +#include + +#define UECP_STATUS_RECEIVED_OK 0 // = Message correctly received +#define UECP_STATUS_CRC_ERROR 1 // = CRC error has occurred: Message is wrong +#define UECP_STATUS_NOT_RECEIVED 2 // = Message was not received (derived from the sequence counter) +#define UECP_STATUS_UNKNOWN_MSG 3 // = Message unknown +#define UECP_STATUS_DSN_ERROR 4 // = DSN error +#define UECP_STATUS_PSN_ERROR 5 // = PSN error +#define UECP_STATUS_PARAM_OUT_OF_RANGE 6 // = Parameter out of range +#define UECP_STATUS_MEL_ERROR 7 // = Message element length error +#define UECP_STATUS_MFL_ERROR 8 // = Message field length error +#define UECP_STATUS_NOT_ACCEPT 9 // = Message not acceptable +#define UECP_STATUS_END_MISSING 10 // = End message (0xFF) missing +#define UECP_STATUS_BUFFER_OVF 11 // = Buffer overflow +#define UECP_STATUS_BAD_STUFFING 12 // = Bad stuffing, after 0xFD a number outside the range 00 to 02 has been received +#define UECP_STATUS_END_UNEXPECTED 13 // = Unexpected end of message (0xFF) received +#define UECP_STATUS_RCVD_NOT_INTERPRET 14 // = Message correctly received, but not interpreted +#define UECP_STATUS_RFT_MISSING 15 // = RFT frame number missing +#define UECP_STATUS_RESERVED 100 +/* + * #define UECP_STATUS_RECEIVED_OK 0 // = Сообщение получено правильно +#define UECP_STATUS_CRC_ERROR 1 // = Произошла ошибка CRC: сообщение неверное +#define UECP_STATUS_NOT_RECEIVED 2 // = Сообщение не получено (получено из счетчика последовательностей) +#define UECP_STATUS_UNKNOWN_MSG 3 // = Сообщение неизвестно +#define UECP_STATUS_DSN_ERROR 4 // = ошибка DSN +#define UECP_STATUS_PSN_ERROR 5 // = ошибка PSN +#define UECP_STATUS_PARAM_OUT_OF_RANGE 6 // = Параметр вне диапазона +#define UECP_STATUS_MEL_ERROR 7 // = Ошибка длины элемента сообщения +#define UECP_STATUS_MFL_ERROR 8 // = Ошибка длины поля сообщения +#define UECP_STATUS_NOT_ACCEPT 9 // = Сообщение неприемлемо +#define UECP_STATUS_END_MISSING 10 // = отсутствует конечное сообщение (0xFF) +#define UECP_STATUS_BUFFER_OVF 11 // = переполнение буфера +#define UECP_STATUS_BAD_STUFFING 12 // = Неверное заполнение, после 0xFD получено число вне диапазона от 00 до 02 +#define UECP_STATUS_END_UNEXPECTED 13 // = получен неожиданный конец сообщения (0xFF) +#define UECP_STATUS_RCVD_NOT_INTERPRET 14 // = Сообщение получено правильно, но не интерпретировано +#define UECP_STATUS_RFT_MISSING 15 // = номер кадра RFT отсутствует +#define UECP_STATUS_RESERVED 100 + */ +#define UECP_MSG_LEN_MAX 255 +#define UECP_MED_LEN_MAX 254 +#define UECP_DATA_FRAME_LEN_MAX 263 // 1+2+1+1+255+2+1 +#define UECP_DATA_FRAME_LEN_MIN 7 // 2+1+1+1+2 + +#define UECP_BUFFER_INDEX_ADDR_HIGH 0 +#define UECP_BUFFER_INDEX_ADDR_LOW 1 +#define UECP_BUFFER_INDEX_SEQUENCE 2 +#define UECP_BUFFER_INDEX_MSG_LENGTH 3 +#define UECP_BUFFER_INDEX_MSG_START 4 + +#define UECP_STA 0xFE +#define UECP_STP 0xFF +#define UECP_STAFFED 0xFD +#define UECP_MEC 4 +#define UECP_DSN 5 +#define UECP_PSN 6 +#define UECP_MEL 7 +#define UECP_MED 8 +#define START_FRAME 0x01 +#define END_FRAME 0x00 + +/* +0 means unidirectional mode (see Section 1.3.1). +1 means bidirectional mode with requested response (see Section 1.3.2). +2 means bidirectional mode with spontaneous response (see Section1.3.3) + */ +#define UNIDIRECTIONAL_MODE 0x00 +#define BIDIRECTIONAL_MODE_WITH_REQUESTED_RESPONSE 0x01 +#define BIDIRECTIONAL_MODE_WITH_SPONTANEOUS_RESPONSE 0x02 +/*! Number of bytes. */ +#define UECP_RX_BUF_LEN_MAX (UECP_DATA_FRAME_LEN_MAX*2)//526 +/*! Uecp reply len array. */ +#define UECP_REPLY_LEN 0x0B //11 + +extern uint8_t UECP_reply_on; + + +uint16_t uecp_crc16_ccitt(uint8_t* data, uint8_t len); + +uint8_t uecp_text_checksum(uint8_t* data, uint8_t len); + +uint8_t UECP_parse_data_frame(uint8_t rxBuffer[]); + +void UECP_data_processing(uint8_t rx , void (*message_handler)(uint8_t * data, const uint8_t size)); + + +#endif /* __UECP_H__ */ + diff --git a/src/uecp/usart.c b/src/uecp/usart.c new file mode 100644 index 0000000..347b4f3 --- /dev/null +++ b/src/uecp/usart.c @@ -0,0 +1,138 @@ + + +#include "usart.h" +#include "uecp.h" +#include "../config.h" +#include "../ports.h" + + +/*! USART data struct used in example. */ +static USART_data_t USART_data; + + + +void sendChar(uint8_t c){while( !(USARTE0_STATUS & USART_DREIF_bm) ); USARTE0_DATA = c;} +void sendString(const char *text){while(*text){sendChar(*text++);}} +void sendStringln(const char *text , uint8_t size) +{ + uint8_t c = 0; + while(*text){sendChar(*text++);c++;if(c==size){break;}} +} +void sendHex(uint8_t a) +{ + char buf[10]; + sprintf (buf, "%02X", a); + sendString(buf); +} + +void sendInt(uint16_t x) +{ + uint8_t p = 1; + if((x/10000)>0){p=0;if(p==0){sendChar(x/10000+0x30);}} + if(((x%10000)/1000)>0||p==0){p=0;if(p==0){sendChar((x%10000)/1000+0x30);}} + if(((x%1000)/100)>0||p==0){p=0;if(p==0){sendChar((x%1000)/100+0x30);}} + if(((x%100)/10)>0||p==0){p=0;if(p==0){sendChar((x%100)/10+0x30);}} + sendChar(x%10+0x30); +} +void USART_setup(void) +{ +#if (USART_PORT == USART_PORT_DSUB) + //RS232 D-Sub9 + //PortC: (IN) - PC2; (OUT) - PC3 + /* PC2 (RXD0) as input. */ + PORTC.DIRCLR = PIN2_bm; + /* PC3 (TXD0) as output. */ + PORTC.DIRSET = PIN3_bm; +#elif (USART_PORT == USART_PORT_USB) + //USB + FT230XS-U + //PortE: (IN) - PE2; (OUT) - PE3 + /* PE2 (RXD0) as input. */ + PORTE.DIRCLR = PIN2_bm; + /* PE3 (TXD0) as output. */ + PORTE.DIRSET = PIN3_bm; +#endif + /* Use USARTC0 and initialize buffers. */ + USART_InterruptDriver_Initialize(&USART_data, &USART, USART_DREINTLVL_LO_gc); + + /* USARTC0, 8 Data bits, No Parity, 1 Stop bit. */ + USART_Format_Set(USART_data.usart, USART_CHSIZE_8BIT_gc, + USART_PMODE_DISABLED_gc, false); + + /* Enable RXC interrupt. */ + USART_RxdInterruptLevel_Set(USART_data.usart, USART_RXCINTLVL_LO_gc); + USART_Baudrate_Set(&USART, (uint8_t) ((10 * (uint32_t)CPU_CLOCK / ((uint32_t)16 * USART_BAUD_RATE) - 10 + 5) / 10), 0);// 206 = (31920000 / (16*9600)) - 1 = 207.8125 - 1 + + /* Enable both RX and TX. */ + USART_Rx_Enable(USART_data.usart); + USART_Tx_Enable(USART_data.usart); + + /* Enable PMIC interrupt level low. */ + PMIC.CTRL |= PMIC_LOLVLEX_bm; + + /* Enable global interrupts. */ + sei(); + +} + +/*! \brief Receive complete interrupt service routine. + * + * Receive complete interrupt service routine. + * Calls the common receive complete handler with pointer to the correct USART + * as argument.*/ + +ISR(USART_RXC_vect) +{ + USART_RXComplete(&USART_data); +} + + +/*! \brief Data register empty interrupt service routine. + * + * Data register empty interrupt service routine. + * Calls the common data register empty complete handler with pointer to the + * correct USART as argument.*/ + +ISR(USART_DRE_vect) +{ + USART_DataRegEmpty(&USART_data); +} +static uint8_t * usart_tx_data; +static uint8_t usart_data_size = 0; +static uint8_t usart_tx_index = 0; + +static void USART_tx_send(uint8_t * data, const uint8_t size) +{ + usart_tx_data = data; + usart_data_size = size; + usart_tx_index = 0; +} + + + + +/*! + * Process TX buffer + * Must be called in a main loop. + *//*254-0-0-0-3-24-0-37-161-3-255*/ +void USART_process_uecp_tx() +{ + while( usart_tx_index < usart_data_size ) + { + // uint8_t uecp []={0xFE,0x00,0x00,0x00,0x03,0x18,0x00,0x25,0xA1,0x03,0xFF}; + if( !USART_TXBuffer_PutByte( &USART_data, (uint8_t) usart_tx_data[ usart_tx_index ] ) ) + { + break; + } + ++usart_tx_index; + } +} +void USART_process_uecp_rx() +{ + while( USART_RXBufferData_Available( &USART_data ) ) + { + uint8_t data = USART_RXBuffer_GetByte( &USART_data ); + //sendChar(data); + UECP_data_processing(data, USART_tx_send ); + //UECP_consume_data(USART_PORT == USART_PORT_DSUB ? UECP_USART_DSUB_STREAM_ID : UECP_USART_USB_STREAM_ID,&data, 1, USART_tx_send ); + } +} diff --git a/src/uecp/usart.h b/src/uecp/usart.h new file mode 100644 index 0000000..b6257ef --- /dev/null +++ b/src/uecp/usart.h @@ -0,0 +1,18 @@ +#ifndef __USART_H__ +#define __USART_H__ + +#include "../drivers/usart_driver.h" +#include "../avr_compiler.h" +#include "../config.h" + + +void USART_setup(void); +void sendChar(uint8_t c); +void sendString(const char *text); +void sendInt(uint16_t x); +void sendHex(uint8_t a); +void sendStringln(const char *text , uint8_t size); +void USART_uecp_rx(uint8_t rx); +void USART_process_uecp_tx(); +void USART_process_uecp_rx(); +#endif // __USART_H__ \ No newline at end of file